From: Pratyush Yadav <p.yadav@ti.com> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com> Cc: Pratyush Yadav <p.yadav@ti.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>, Sekhar Nori <nsekhar@ti.com> Subject: [PATCH v2 07/11] mtd: spi-nor: get command opcode extension type from BFPT Date: Wed, 26 Feb 2020 15:06:59 +0530 [thread overview] Message-ID: <20200226093703.19765-8-p.yadav@ti.com> (raw) In-Reply-To: <20200226093703.19765-1-p.yadav@ti.com> Some devices in DTR mode expect an extra command byte called the extension. The extension can either be same as the opcode, bitwise inverse of the opcode, or another additional byte forming a 16-byte opcode. Get the extension type from the BFPT. For now, only flashes with "repeat" and "inverse" extensions are supported. As of JESD216D.01, BFPT is 20 DWORDs, so update the table size to reflect that. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> --- drivers/mtd/spi-nor/spi-nor.c | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 6102520550a1..c86c1537f76e 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -79,11 +79,11 @@ struct sfdp_header { /* Basic Flash Parameter Table */ /* - * JESD216 rev B defines a Basic Flash Parameter Table of 16 DWORDs. - * They are indexed from 1 but C arrays are indexed from 0. + * JESD216 rev D defines a Basic Flash Parameter Table of 20 DWORDs. They are + * indexed from 1 but C arrays are indexed from 0. */ #define BFPT_DWORD(i) ((i) - 1) -#define BFPT_DWORD_MAX 16 +#define BFPT_DWORD_MAX 20 /* The first version of JESD216 defined only 9 DWORDs. */ #define BFPT_DWORD_MAX_JESD216 9 @@ -148,6 +148,12 @@ struct sfdp_header { #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD (0x4UL << 20) #define BFPT_DWORD15_QER_SR2_BIT1 (0x5UL << 20) /* Spansion */ +#define BFPT_DWORD18_CMD_EXT_MASK GENMASK(30, 29) +#define BFPT_DWORD18_CMD_EXT_REP (0x0UL << 29) /* Repeat */ +#define BFPT_DWORD18_CMD_EXT_INV (0x1UL << 29) /* Invert */ +#define BFPT_DWORD18_CMD_EXT_RES (0x2UL << 29) /* Reserved */ +#define BFPT_DWORD18_CMD_EXT_16B (0x3UL << 29) /* 16-bit opcode */ + struct sfdp_bfpt { u32 dwords[BFPT_DWORD_MAX]; }; @@ -3867,6 +3873,24 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, return -EINVAL; } + /* 8D-8D-8D command extension. */ + switch (bfpt.dwords[BFPT_DWORD(18)] & BFPT_DWORD18_CMD_EXT_MASK) { + case BFPT_DWORD18_CMD_EXT_REP: + nor->cmd_ext = SPI_MEM_EXT_REPEAT; + break; + + case BFPT_DWORD18_CMD_EXT_INV: + nor->cmd_ext = SPI_MEM_EXT_INVERT; + break; + + case BFPT_DWORD18_CMD_EXT_RES: + return -EINVAL; + + case BFPT_DWORD18_CMD_EXT_16B: + dev_err(nor->dev, "16-bit opcodes not supported\n"); + return -ENOTSUPP; + } + return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params); } -- 2.25.0
WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org, Sekhar Nori <nsekhar@ti.com>, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, Pratyush Yadav <p.yadav@ti.com> Subject: [PATCH v2 07/11] mtd: spi-nor: get command opcode extension type from BFPT Date: Wed, 26 Feb 2020 15:06:59 +0530 [thread overview] Message-ID: <20200226093703.19765-8-p.yadav@ti.com> (raw) In-Reply-To: <20200226093703.19765-1-p.yadav@ti.com> Some devices in DTR mode expect an extra command byte called the extension. The extension can either be same as the opcode, bitwise inverse of the opcode, or another additional byte forming a 16-byte opcode. Get the extension type from the BFPT. For now, only flashes with "repeat" and "inverse" extensions are supported. As of JESD216D.01, BFPT is 20 DWORDs, so update the table size to reflect that. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> --- drivers/mtd/spi-nor/spi-nor.c | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 6102520550a1..c86c1537f76e 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -79,11 +79,11 @@ struct sfdp_header { /* Basic Flash Parameter Table */ /* - * JESD216 rev B defines a Basic Flash Parameter Table of 16 DWORDs. - * They are indexed from 1 but C arrays are indexed from 0. + * JESD216 rev D defines a Basic Flash Parameter Table of 20 DWORDs. They are + * indexed from 1 but C arrays are indexed from 0. */ #define BFPT_DWORD(i) ((i) - 1) -#define BFPT_DWORD_MAX 16 +#define BFPT_DWORD_MAX 20 /* The first version of JESD216 defined only 9 DWORDs. */ #define BFPT_DWORD_MAX_JESD216 9 @@ -148,6 +148,12 @@ struct sfdp_header { #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD (0x4UL << 20) #define BFPT_DWORD15_QER_SR2_BIT1 (0x5UL << 20) /* Spansion */ +#define BFPT_DWORD18_CMD_EXT_MASK GENMASK(30, 29) +#define BFPT_DWORD18_CMD_EXT_REP (0x0UL << 29) /* Repeat */ +#define BFPT_DWORD18_CMD_EXT_INV (0x1UL << 29) /* Invert */ +#define BFPT_DWORD18_CMD_EXT_RES (0x2UL << 29) /* Reserved */ +#define BFPT_DWORD18_CMD_EXT_16B (0x3UL << 29) /* 16-bit opcode */ + struct sfdp_bfpt { u32 dwords[BFPT_DWORD_MAX]; }; @@ -3867,6 +3873,24 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, return -EINVAL; } + /* 8D-8D-8D command extension. */ + switch (bfpt.dwords[BFPT_DWORD(18)] & BFPT_DWORD18_CMD_EXT_MASK) { + case BFPT_DWORD18_CMD_EXT_REP: + nor->cmd_ext = SPI_MEM_EXT_REPEAT; + break; + + case BFPT_DWORD18_CMD_EXT_INV: + nor->cmd_ext = SPI_MEM_EXT_INVERT; + break; + + case BFPT_DWORD18_CMD_EXT_RES: + return -EINVAL; + + case BFPT_DWORD18_CMD_EXT_16B: + dev_err(nor->dev, "16-bit opcodes not supported\n"); + return -ENOTSUPP; + } + return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params); } -- 2.25.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-02-26 9:37 UTC|newest] Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-02-26 9:36 [PATCH v2 00/11] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-26 9:36 ` [PATCH v2 01/11] dt-bindings: spi: allow expressing DTR capability Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:11 ` Boris Brezillon 2020-02-27 16:11 ` Boris Brezillon 2020-02-27 16:11 ` Boris Brezillon 2020-02-27 16:28 ` Mark Brown 2020-02-27 16:28 ` Mark Brown 2020-02-27 16:28 ` Mark Brown 2020-02-27 16:40 ` Geert Uytterhoeven 2020-02-27 16:40 ` Geert Uytterhoeven 2020-02-27 16:40 ` Geert Uytterhoeven 2020-02-27 16:44 ` Mark Brown 2020-02-27 16:44 ` Mark Brown 2020-02-27 16:44 ` Mark Brown 2020-02-27 17:03 ` Geert Uytterhoeven 2020-02-27 17:03 ` Geert Uytterhoeven 2020-02-27 17:03 ` Geert Uytterhoeven 2020-03-02 9:53 ` Pratyush Yadav 2020-03-02 9:53 ` Pratyush Yadav 2020-02-27 17:06 ` Boris Brezillon 2020-02-27 17:06 ` Boris Brezillon 2020-02-27 17:06 ` Boris Brezillon 2020-02-27 16:29 ` Geert Uytterhoeven 2020-02-27 16:29 ` Geert Uytterhoeven 2020-02-27 16:29 ` Geert Uytterhoeven 2020-02-28 9:46 ` Pratyush Yadav 2020-02-28 9:46 ` Pratyush Yadav 2020-02-26 9:36 ` [PATCH v2 02/11] spi: set mode bits for "spi-rx-dtr" and "spi-tx-dtr" Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:23 ` Boris Brezillon 2020-02-27 16:23 ` Boris Brezillon 2020-02-27 16:23 ` Boris Brezillon 2020-03-02 9:48 ` Pratyush Yadav 2020-03-02 9:48 ` Pratyush Yadav 2020-03-02 10:20 ` Boris Brezillon 2020-03-02 10:20 ` Boris Brezillon 2020-03-02 10:20 ` Boris Brezillon 2020-02-26 9:36 ` [PATCH v2 03/11] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:36 ` Boris Brezillon 2020-02-27 16:36 ` Boris Brezillon 2020-02-27 16:36 ` Boris Brezillon 2020-02-26 9:36 ` [PATCH v2 04/11] spi: spi-mem: allow specifying a command's extension Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:44 ` Boris Brezillon 2020-02-27 16:44 ` Boris Brezillon 2020-02-27 16:44 ` Boris Brezillon 2020-02-28 9:41 ` Pratyush Yadav 2020-02-28 9:41 ` Pratyush Yadav 2020-02-26 9:36 ` [PATCH v2 05/11] spi: cadence-quadspi: Add support for octal DTR flashes Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-26 9:36 ` [PATCH v2 06/11] mtd: spi-nor: add support for DTR protocol Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-26 9:36 ` Pratyush Yadav 2020-02-27 16:58 ` Boris Brezillon 2020-02-27 16:58 ` Boris Brezillon 2020-02-28 9:36 ` Pratyush Yadav 2020-02-28 9:36 ` Pratyush Yadav 2020-02-28 9:36 ` Pratyush Yadav 2020-02-28 10:53 ` Boris Brezillon 2020-02-28 10:53 ` Boris Brezillon 2020-02-28 10:53 ` Boris Brezillon 2020-02-28 12:07 ` Pratyush Yadav 2020-02-28 12:07 ` Pratyush Yadav 2020-02-28 12:07 ` Pratyush Yadav 2020-02-28 13:18 ` Boris Brezillon 2020-02-28 13:18 ` Boris Brezillon 2020-02-28 13:18 ` Boris Brezillon 2020-02-26 9:36 ` Pratyush Yadav [this message] 2020-02-26 9:36 ` [PATCH v2 07/11] mtd: spi-nor: get command opcode extension type from BFPT Pratyush Yadav 2020-02-26 9:37 ` [PATCH v2 08/11] mtd: spi-nor: parse xSPI Profile 1.0 table Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` [PATCH v2 09/11] mtd: spi-nor: use dummy cycle and address width info from SFDP Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` [PATCH v2 10/11] mtd: spi-nor: enable octal DTR mode when possible Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` [PATCH v2 11/11] mtd: spi-nor: add support for Cypress Semper flash Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav 2020-02-26 9:37 ` Pratyush Yadav
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200226093703.19765-8-p.yadav@ti.com \ --to=p.yadav@ti.com \ --cc=broonie@kernel.org \ --cc=devicetree@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mtd@lists.infradead.org \ --cc=linux-spi@vger.kernel.org \ --cc=mark.rutland@arm.com \ --cc=miquel.raynal@bootlin.com \ --cc=nsekhar@ti.com \ --cc=richard@nod.at \ --cc=robh+dt@kernel.org \ --cc=tudor.ambarus@microchip.com \ --cc=vigneshr@ti.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.