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From: Andre Przywara <andre.przywara@arm.com>
To: Rob Herring <robh@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Cc: Robert Richter <rric@kernel.org>,
	soc@kernel.org, Jon Loeliger <jdl@jdl.com>,
	Mark Langsdorf <mlangsdo@redhat.com>,
	Eric Auger <eric.auger@redhat.com>, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>
Subject: [PATCH 01/13] arm: dts: calxeda: Basic DT file fixes
Date: Wed, 26 Feb 2020 18:08:49 +0000	[thread overview]
Message-ID: <20200226180901.89940-2-andre.przywara@arm.com> (raw)
In-Reply-To: <20200226180901.89940-1-andre.przywara@arm.com>

The .dts files for the Calxeda machines are quite old, so carry some
sloppy mistakes that the DT schema checker will complain about.

Fix those issues, they should not have any effect on functionality.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/ecx-2000.dts | 3 ---
 arch/arm/boot/dts/highbank.dts | 7 ++-----
 2 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 5651ae6dc969..81eb382b4c23 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -13,7 +13,6 @@
 	compatible = "calxeda,ecx-2000";
 	#address-cells = <2>;
 	#size-cells = <2>;
-	clock-ranges;
 
 	cpus {
 		#address-cells = <1>;
@@ -83,8 +82,6 @@
 		intc: interrupt-controller@fff11000 {
 			compatible = "arm,cortex-a15-gic";
 			#interrupt-cells = <3>;
-			#size-cells = <0>;
-			#address-cells = <1>;
 			interrupt-controller;
 			interrupts = <1 9 0xf04>;
 			reg = <0xfff11000 0x1000>,
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index f4e4dca6f7e7..9e34d1bd7994 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -13,7 +13,6 @@
 	compatible = "calxeda,highbank";
 	#address-cells = <1>;
 	#size-cells = <1>;
-	clock-ranges;
 
 	cpus {
 		#address-cells = <1>;
@@ -96,7 +95,7 @@
 		};
 	};
 
-	memory {
+	memory@0 {
 		name = "memory";
 		device_type = "memory";
 		reg = <0x00000000 0xff900000>;
@@ -128,14 +127,12 @@
 		intc: interrupt-controller@fff11000 {
 			compatible = "arm,cortex-a9-gic";
 			#interrupt-cells = <3>;
-			#size-cells = <0>;
-			#address-cells = <1>;
 			interrupt-controller;
 			reg = <0xfff11000 0x1000>,
 			      <0xfff10100 0x100>;
 		};
 
-		L2: l2-cache {
+		L2: cache-controller {
 			compatible = "arm,pl310-cache";
 			reg = <0xfff12000 0x1000>;
 			interrupts = <0 70 4>;
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: Rob Herring <robh@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Cc: Jon Loeliger <jdl@jdl.com>, Mark Langsdorf <mlangsdo@redhat.com>,
	Robert Richter <rric@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Eric Auger <eric.auger@redhat.com>,
	soc@kernel.org, Will Deacon <will@kernel.org>
Subject: [PATCH 01/13] arm: dts: calxeda: Basic DT file fixes
Date: Wed, 26 Feb 2020 18:08:49 +0000	[thread overview]
Message-ID: <20200226180901.89940-2-andre.przywara@arm.com> (raw)
In-Reply-To: <20200226180901.89940-1-andre.przywara@arm.com>

The .dts files for the Calxeda machines are quite old, so carry some
sloppy mistakes that the DT schema checker will complain about.

Fix those issues, they should not have any effect on functionality.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/ecx-2000.dts | 3 ---
 arch/arm/boot/dts/highbank.dts | 7 ++-----
 2 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 5651ae6dc969..81eb382b4c23 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -13,7 +13,6 @@
 	compatible = "calxeda,ecx-2000";
 	#address-cells = <2>;
 	#size-cells = <2>;
-	clock-ranges;
 
 	cpus {
 		#address-cells = <1>;
@@ -83,8 +82,6 @@
 		intc: interrupt-controller@fff11000 {
 			compatible = "arm,cortex-a15-gic";
 			#interrupt-cells = <3>;
-			#size-cells = <0>;
-			#address-cells = <1>;
 			interrupt-controller;
 			interrupts = <1 9 0xf04>;
 			reg = <0xfff11000 0x1000>,
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index f4e4dca6f7e7..9e34d1bd7994 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -13,7 +13,6 @@
 	compatible = "calxeda,highbank";
 	#address-cells = <1>;
 	#size-cells = <1>;
-	clock-ranges;
 
 	cpus {
 		#address-cells = <1>;
@@ -96,7 +95,7 @@
 		};
 	};
 
-	memory {
+	memory@0 {
 		name = "memory";
 		device_type = "memory";
 		reg = <0x00000000 0xff900000>;
@@ -128,14 +127,12 @@
 		intc: interrupt-controller@fff11000 {
 			compatible = "arm,cortex-a9-gic";
 			#interrupt-cells = <3>;
-			#size-cells = <0>;
-			#address-cells = <1>;
 			interrupt-controller;
 			reg = <0xfff11000 0x1000>,
 			      <0xfff10100 0x100>;
 		};
 
-		L2: l2-cache {
+		L2: cache-controller {
 			compatible = "arm,pl310-cache";
 			reg = <0xfff12000 0x1000>;
 			interrupts = <0 70 4>;
-- 
2.17.1


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  reply	other threads:[~2020-02-26 18:09 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-26 18:08 [PATCH 00/13] arm: calxeda: update DTS, bindings and MAINTAINERS Andre Przywara
2020-02-26 18:08 ` Andre Przywara
2020-02-26 18:08 ` Andre Przywara [this message]
2020-02-26 18:08   ` [PATCH 01/13] arm: dts: calxeda: Basic DT file fixes Andre Przywara
2020-02-26 18:08 ` [PATCH 02/13] arm: dts: calxeda: Provide UART clock Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:08 ` [PATCH 03/13] arm: dts: calxeda: Fix interrupt grouping Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:08 ` [PATCH 04/13] arm: dts: calxeda: Group port-phys and sgpio-gpio items Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:08 ` [PATCH 05/13] dt-bindings: clock: Convert Calxeda clock bindings to json-schema Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:24   ` Maxime Ripard
2020-02-26 18:24     ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 06/13] dt-bindings: sata: Convert Calxeda SATA controller " Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:25   ` Maxime Ripard
2020-02-26 18:25     ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 07/13] dt-bindings: net: Convert Calxeda Ethernet binding " Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:26   ` Maxime Ripard
2020-02-26 18:26     ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 08/13] dt-bindings: phy: Convert Calxeda ComboPHY " Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:26   ` Maxime Ripard
2020-02-26 18:26     ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 09/13] dt-bindings: arm: Convert Calxeda L2 cache controller " Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:08 ` [PATCH 10/13] dt-bindings: memory-controllers: convert Calxeda DDR " Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:27   ` Maxime Ripard
2020-02-26 18:27     ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 11/13] dt-bindings: ipmi: Convert IPMI-SMIC bindings " Andre Przywara
2020-02-26 18:08   ` Andre Przywara
2020-02-26 18:09 ` [PATCH 12/13] dt-bindings: arm: Add Calxeda system registers json-schema binding Andre Przywara
2020-02-26 18:09   ` Andre Przywara
2020-02-26 21:57   ` Rob Herring
2020-02-26 21:57     ` Rob Herring
2020-02-27  0:12     ` André Przywara
2020-02-27  0:12       ` André Przywara
2020-02-27 14:44       ` Rob Herring
2020-02-27 14:44         ` Rob Herring
2020-02-26 18:09 ` [PATCH 13/13] MAINTAINERS: Update Calxeda Highbank maintainership Andre Przywara
2020-02-26 18:09   ` Andre Przywara

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