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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 00/13] drm/i915: Clean up DPLL output/refclock tracking
Date: Wed, 26 Feb 2020 22:34:42 +0200	[thread overview]
Message-ID: <20200226203455.23032-1-imre.deak@intel.com> (raw)

This patchset moves the platforms specific functions calculating the
DPLL frequency next to the counterpart functions calculating DPLL params
from a given frequency.

It also adds a way to track the DPLL reference clock frequencies in a
unified way across platforms.

Imre Deak (13):
  drm/i915: Fix bounds check in intel_get_shared_dpll_id()
  drm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.c
  drm/i915: Keep the global DPLL state in a DPLL specific struct
  drm/i915: Move the DPLL vfunc inits after the func defines
  drm/i915/hsw: Use the DPLL ID when calculating DPLL clock
  drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.c
  drm/i915/skl: Parametrize the DPLL ref clock instead of open-coding it
  drm/i915/hsw: Rename the get HDMI/DP DPLL funcs to get WRPLL/LCPLL
  drm/i915/hsw: Split out the SPLL parameter calculation
  drm/i915/hsw: Split out the WRPLL,LCPLL,SPLL frequency calculation
  drm/i915/skl,cnl: Split out the WRPLL/LCPLL frequency calculation
  drm/i915/hsw: Use the read-out WRPLL/SPLL state instead of reading out
    again
  drm/i915: Unify the DPLL ref clock frequency tracking

 drivers/gpu/drm/i915/display/icl_dsi.c        |  18 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      | 455 +---------
 drivers/gpu/drm/i915/display/intel_ddi.h      |   2 -
 drivers/gpu/drm/i915/display/intel_display.c  |  52 +-
 .../drm/i915/display/intel_display_debugfs.c  |   9 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 808 +++++++++++++++---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h |   8 +-
 drivers/gpu/drm/i915/i915_drv.h               |  27 +-
 8 files changed, 736 insertions(+), 643 deletions(-)

-- 
2.23.1

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             reply	other threads:[~2020-02-26 20:35 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-26 20:34 Imre Deak [this message]
2020-02-26 20:34 ` [Intel-gfx] [PATCH 01/13] drm/i915: Fix bounds check in intel_get_shared_dpll_id() Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 02/13] drm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.c Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 03/13] drm/i915: Keep the global DPLL state in a DPLL specific struct Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 04/13] drm/i915: Move the DPLL vfunc inits after the func defines Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 05/13] drm/i915/hsw: Use the DPLL ID when calculating DPLL clock Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 06/13] drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.c Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 07/13] drm/i915/skl: Parametrize the DPLL ref clock instead of open-coding it Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 08/13] drm/i915/hsw: Rename the get HDMI/DP DPLL funcs to get WRPLL/LCPLL Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 09/13] drm/i915/hsw: Split out the SPLL parameter calculation Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 10/13] drm/i915/hsw: Split out the WRPLL, LCPLL, SPLL frequency calculation Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 11/13] drm/i915/skl, cnl: Split out the WRPLL/LCPLL " Imre Deak
2020-02-27 17:57   ` Ville Syrjälä
2020-02-27 18:34     ` Imre Deak
2020-02-27 18:49       ` Ville Syrjälä
2020-02-26 20:34 ` [Intel-gfx] [PATCH 12/13] drm/i915/hsw: Use the read-out WRPLL/SPLL state instead of reading out again Imre Deak
2020-02-27 17:58   ` Ville Syrjälä
2020-02-26 20:34 ` [Intel-gfx] [PATCH 13/13] drm/i915: Unify the DPLL ref clock frequency tracking Imre Deak
2020-02-27 18:13   ` Ville Syrjälä
2020-02-27 19:01     ` Imre Deak
2020-02-28 15:33   ` [Intel-gfx] [PATCH v2 " Imre Deak
2020-02-27  4:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clean up DPLL output/refclock tracking Patchwork
2020-02-27  4:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-02-27  4:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-28  0:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-02-28 17:49 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clean up DPLL output/refclock tracking (rev2) Patchwork
2020-02-28 17:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-02-28 18:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-01 14:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-03-02 13:31   ` Imre Deak
2020-03-02 14:30     ` Vudum, Lakshminarayana
2020-03-02 13:56 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-03-02 17:39   ` Imre Deak

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