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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/7] drm/i915/gt: Pull restoration of GGTT fences underneath the GT
Date: Sat, 14 Mar 2020 12:20:53 +0000	[thread overview]
Message-ID: <20200314122058.21472-2-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20200314122058.21472-1-chris@chris-wilson.co.uk>

Make the GT responsible for restoring its fence when it wakes up from
suspend.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_ggtt.c      | 2 ++
 drivers/gpu/drm/i915/gt/intel_gt_pm.c     | 1 +
 drivers/gpu/drm/i915/i915_drv.c           | 4 ----
 drivers/gpu/drm/i915/i915_gem.c           | 1 -
 drivers/gpu/drm/i915/selftests/i915_gem.c | 2 --
 5 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index a7b72fa569a7..bde4f64a41f7 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1195,6 +1195,8 @@ void i915_ggtt_resume(struct i915_ggtt *ggtt)
 
 	if (INTEL_GEN(ggtt->vm.i915) >= 8)
 		setup_private_pat(ggtt->vm.gt->uncore);
+
+	intel_ggtt_restore_fences(ggtt);
 }
 
 static struct scatterlist *
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 8b653c0f5e5f..2e40400d1ecd 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -324,6 +324,7 @@ int intel_gt_runtime_resume(struct intel_gt *gt)
 {
 	GT_TRACE(gt, "\n");
 	intel_gt_init_swizzling(gt);
+	intel_ggtt_restore_fences(gt->ggtt);
 
 	return intel_uc_runtime_resume(&gt->uc);
 }
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 832140f4ea3d..48ba37e35bea 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1288,7 +1288,6 @@ static int i915_drm_resume(struct drm_device *dev)
 		drm_err(&dev_priv->drm, "failed to re-enable GGTT\n");
 
 	i915_ggtt_resume(&dev_priv->ggtt);
-	intel_ggtt_restore_fences(&dev_priv->ggtt);
 
 	intel_csr_ucode_resume(dev_priv);
 
@@ -1606,8 +1605,6 @@ static int intel_runtime_suspend(struct device *kdev)
 
 		intel_gt_runtime_resume(&dev_priv->gt);
 
-		intel_ggtt_restore_fences(&dev_priv->ggtt);
-
 		enable_rpm_wakeref_asserts(rpm);
 
 		return ret;
@@ -1687,7 +1684,6 @@ static int intel_runtime_resume(struct device *kdev)
 	 * we can do is to hope that things will still work (and disable RPM).
 	 */
 	intel_gt_runtime_resume(&dev_priv->gt);
-	intel_ggtt_restore_fences(&dev_priv->ggtt);
 
 	/*
 	 * On VLV/CHV display interrupts are part of the display
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 2c53be0bd9fd..762b50b08d73 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1156,7 +1156,6 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 		/* Minimal basic recovery for KMS */
 		ret = i915_ggtt_enable_hw(dev_priv);
 		i915_ggtt_resume(&dev_priv->ggtt);
-		intel_ggtt_restore_fences(&dev_priv->ggtt);
 		intel_init_clock_gating(dev_priv);
 	}
 
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
index 7ea517a21e0b..88d400b9df88 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -125,8 +125,6 @@ static void pm_resume(struct drm_i915_private *i915)
 	 */
 	with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
 		i915_ggtt_resume(&i915->ggtt);
-		intel_ggtt_restore_fences(&i915->ggtt);
-
 		i915_gem_resume(i915);
 	}
 }
-- 
2.20.1

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  reply	other threads:[~2020-03-14 12:21 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-14 12:20 [Intel-gfx] [PATCH 1/7] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
2020-03-14 12:20 ` Chris Wilson [this message]
2020-03-14 12:20 ` [Intel-gfx] [PATCH 3/7] drm/i915: Remove manual save/resume of fence register state Chris Wilson
2020-03-16  7:14   ` Mika Kuoppala
2020-03-14 12:20 ` [Intel-gfx] [PATCH 4/7] drm/i915/gt: Allocate i915_fence_reg array Chris Wilson
2020-03-16  7:29   ` Mika Kuoppala
2020-03-16 10:23     ` Chris Wilson
2020-03-16 11:20   ` Mika Kuoppala
2020-03-14 12:20 ` [Intel-gfx] [PATCH 5/7] drm/i915/gt: Store the fence details on the fence Chris Wilson
2020-03-14 12:20 ` [Intel-gfx] [PATCH 6/7] drm/i915/gt: Only wait for GPU activity before unbinding a GGTT fence Chris Wilson
2020-03-14 12:20 ` [Intel-gfx] [PATCH 7/7] drm/i915/gt: Make fence revocation unequivocal Chris Wilson
2020-03-16  7:02 ` [Intel-gfx] [PATCH 1/7] drm/i915: Move GGTT fence registers under gt/ Mika Kuoppala
2020-03-16 15:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] " Patchwork
2020-03-16 16:06 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-16 16:17 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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