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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 09/15] drm/i915: Immediately execute the fenced work
Date: Mon, 16 Mar 2020 11:42:31 +0000	[thread overview]
Message-ID: <20200316114237.5436-9-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20200316114237.5436-1-chris@chris-wilson.co.uk>

If the caller allows and we do not have to wait for any signals,
immediately execute the work within the caller's process.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +-
 drivers/gpu/drm/i915/i915_sw_fence_work.c      | 6 +++++-
 drivers/gpu/drm/i915/i915_sw_fence_work.h      | 7 +++++++
 drivers/gpu/drm/i915/i915_vma.c                | 2 +-
 4 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index d3f4f28e9468..f647f98a9bc6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1784,7 +1784,7 @@ static int eb_parse_pipeline(struct i915_execbuffer *eb,
 	dma_resv_add_excl_fence(shadow->resv, &pw->base.dma);
 	dma_resv_unlock(shadow->resv);
 
-	dma_fence_work_commit(&pw->base);
+	dma_fence_work_commit_imm(&pw->base);
 	return 0;
 
 err_batch_unlock:
diff --git a/drivers/gpu/drm/i915/i915_sw_fence_work.c b/drivers/gpu/drm/i915/i915_sw_fence_work.c
index 997b2998f1f2..cb2858d369cf 100644
--- a/drivers/gpu/drm/i915/i915_sw_fence_work.c
+++ b/drivers/gpu/drm/i915/i915_sw_fence_work.c
@@ -38,7 +38,10 @@ fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
 
 		if (!f->dma.error) {
 			dma_fence_get(&f->dma);
-			queue_work(system_unbound_wq, &f->work);
+			if (f->immediate)
+				fence_work(&f->work);
+			else
+				queue_work(system_unbound_wq, &f->work);
 		} else {
 			fence_complete(f);
 		}
@@ -88,6 +91,7 @@ void dma_fence_work_init(struct dma_fence_work *f,
 	dma_fence_init(&f->dma, &fence_ops, &f->lock, 0, 0);
 	i915_sw_fence_init(&f->chain, fence_notify);
 	INIT_WORK(&f->work, fence_work);
+	f->immediate = false;
 }
 
 int dma_fence_work_chain(struct dma_fence_work *f, struct dma_fence *signal)
diff --git a/drivers/gpu/drm/i915/i915_sw_fence_work.h b/drivers/gpu/drm/i915/i915_sw_fence_work.h
index 3a22b287e201..c258a2b2e6f4 100644
--- a/drivers/gpu/drm/i915/i915_sw_fence_work.h
+++ b/drivers/gpu/drm/i915/i915_sw_fence_work.h
@@ -28,6 +28,7 @@ struct dma_fence_work {
 	struct i915_sw_fence chain;
 	struct i915_sw_dma_fence_cb cb;
 
+	bool immediate;
 	struct work_struct work;
 	const struct dma_fence_work_ops *ops;
 };
@@ -41,4 +42,10 @@ static inline void dma_fence_work_commit(struct dma_fence_work *f)
 	i915_sw_fence_commit(&f->chain);
 }
 
+static inline void dma_fence_work_commit_imm(struct dma_fence_work *f)
+{
+	f->immediate = atomic_read(&f->chain.pending) <= 1;
+	dma_fence_work_commit(f);
+}
+
 #endif /* I915_SW_FENCE_WORK_H */
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 73dafaafb3e5..880e18f5b71b 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -956,7 +956,7 @@ int i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
 	mutex_unlock(&vma->vm->mutex);
 err_fence:
 	if (work)
-		dma_fence_work_commit(&work->base);
+		dma_fence_work_commit_imm(&work->base);
 	if (wakeref)
 		intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref);
 err_pages:
-- 
2.20.1

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  parent reply	other threads:[~2020-03-16 11:42 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-16 11:42 [Intel-gfx] [PATCH 01/15] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 02/15] drm/i915/gt: Pull restoration of GGTT fences underneath the GT Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 03/15] drm/i915: Remove manual save/resume of fence register state Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 04/15] drm/i915/gt: Allocate i915_fence_reg array Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 05/15] drm/i915/gt: Only wait for GPU activity before unbinding a GGTT fence Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 06/15] drm/i915/gt: Store the fence details on the fence Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 07/15] drm/i915/gt: Make fence revocation unequivocal Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 08/15] drm/i915/gem: Drop cached obj->bind_count Chris Wilson
2020-03-16 11:42 ` Chris Wilson [this message]
2020-03-16 11:42 ` [Intel-gfx] [PATCH 10/15] drm/i915/gem: Assign context id for async work Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 11/15] drm/i915: Export a preallocate variant of i915_active_acquire() Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 12/15] drm/i915/gem: Split eb_vma into its own allocation Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 13/15] drm/i915/gem: Separate the ww_mutex walker into its own list Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 14/15] drm/i915/gem: Asynchronous GTT unbinding Chris Wilson
2020-03-16 11:42 ` [Intel-gfx] [PATCH 15/15] drm/i915/gem: Bind the fence async for execbuf Chris Wilson
2020-03-16 20:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/15] drm/i915: Move GGTT fence registers under gt/ Patchwork
2020-03-16 20:54 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-16 21:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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