From: Hyunki Koo <hyunki00.koo@samsung.com> To: unlisted-recipients:; (no To-header on input) Cc: hyunki00.koo@gmail.com, Hyunki Koo <hyunki00.koo@samsung.com>, Kukjin Kim <kgene@kernel.org>, Krzysztof Kozlowski <krzk@kernel.org>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jiri Slaby <jslaby@suse.com>, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] tty: samsung_tty: 32-bit access for TX/RX hold registers Date: Wed, 1 Apr 2020 17:27:20 +0900 [thread overview] Message-ID: <20200401082721.19431-1-hyunki00.koo@samsung.com> (raw) In-Reply-To: CGME20200401082749epcas2p2a774da515805bc3f761b6b5a8dc9e3d2@epcas2p2.samsung.com Support 32-bit access for the TX/RX hold registers UTXH and URXH. This is required for some newer SoCs. Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> --- drivers/tty/serial/samsung_tty.c | 76 +++++++++++++++++++++++++++++++++------- 1 file changed, 64 insertions(+), 12 deletions(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index 73f951d65b93..17d2ead7cfe2 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { #define portaddrl(port, reg) \ ((unsigned long *)(unsigned long)((port)->membase + (reg))) -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg))) +static unsigned int rd_reg(struct uart_port *port, int reg) +{ + switch (port->iotype) { + case UPIO_MEM: + return readb_relaxed(portaddr(port, reg)); + case UPIO_MEM32: + return readl_relaxed(portaddr(port, reg)); + default: + return 0; + } + return 0; +} + #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg))) -#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg)) +static void wr_reg(struct uart_port *port, int reg, int val) +{ + switch (port->iotype) { + case UPIO_MEM: + writeb_relaxed(val, portaddr(port, reg)); + break; + case UPIO_MEM32: + writel_relaxed(val, portaddr(port, reg)); + break; + } +} + #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg)) +static void write_buf(struct uart_port *port, int reg, int val) +{ + switch (port->iotype) { + case UPIO_MEM: + writeb(val, portaddr(port, reg)); + break; + case UPIO_MEM32: + writel(val, portaddr(port, reg)); + break; + } +} + /* Byte-order aware bit setting/clearing functions. */ static inline void s3c24xx_set_bit(struct uart_port *port, int idx, @@ -714,7 +749,7 @@ static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport) fifocnt--; uerstat = rd_regl(port, S3C2410_UERSTAT); - ch = rd_regb(port, S3C2410_URXH); + ch = rd_reg(port, S3C2410_URXH); if (port->flags & UPF_CONS_FLOW) { int txe = s3c24xx_serial_txempty_nofifo(port); @@ -826,7 +861,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) } if (port->x_char) { - wr_regb(port, S3C2410_UTXH, port->x_char); + wr_reg(port, S3C2410_UTXH, port->x_char); port->icount.tx++; port->x_char = 0; goto out; @@ -852,7 +887,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) break; - wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); + wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); port->icount.tx++; count--; @@ -916,7 +951,7 @@ static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port) /* no modem control lines */ static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) { - unsigned int umstat = rd_regb(port, S3C2410_UMSTAT); + unsigned int umstat = rd_regl(port, S3C2410_UMSTAT); if (umstat & S3C2410_UMSTAT_CTS) return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ -1974,7 +2009,7 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct s3c24xx_uart_port *ourport; int index = probe_index; - int ret; + int ret, prop = 0; if (np) { ret = of_alias_get_id(np, "serial"); @@ -2000,10 +2035,27 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) dev_get_platdata(&pdev->dev) : ourport->drv_data->def_cfg; - if (np) + if (np) { of_property_read_u32(np, "samsung,uart-fifosize", &ourport->port.fifosize); + if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { + switch (prop) { + case 1: + ourport->port.iotype = UPIO_MEM; + break; + case 4: + ourport->port.iotype = UPIO_MEM32; + break; + default: + dev_warn(&pdev->dev, "unsupported reg-io-width (%d)\n", + prop); + ret = -EINVAL; + break; + } + } + } + if (ourport->drv_data->fifosize[index]) ourport->port.fifosize = ourport->drv_data->fifosize[index]; else if (ourport->info->fifosize) @@ -2185,7 +2237,7 @@ static int s3c24xx_serial_get_poll_char(struct uart_port *port) if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0) return NO_POLL_CHAR; - return rd_regb(port, S3C2410_URXH); + return rd_reg(port, S3C2410_URXH); } static void s3c24xx_serial_put_poll_char(struct uart_port *port, @@ -2200,7 +2252,7 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port, while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); - wr_regb(port, S3C2410_UTXH, c); + wr_reg(port, S3C2410_UTXH, c); } #endif /* CONFIG_CONSOLE_POLL */ @@ -2212,7 +2264,7 @@ s3c24xx_serial_console_putchar(struct uart_port *port, int ch) while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); - wr_regb(port, S3C2410_UTXH, ch); + wr_reg(port, S3C2410_UTXH, ch); } static void @@ -2612,7 +2664,7 @@ static void samsung_early_putc(struct uart_port *port, int c) else samsung_early_busyuart(port); - writeb(c, port->membase + S3C2410_UTXH); + write_buf(port, S3C2410_UTXH, c); } static void samsung_early_write(struct console *con, const char *s, -- 2.15.0.rc1
WARNING: multiple messages have this Message-ID (diff)
From: Hyunki Koo <hyunki00.koo@samsung.com> Cc: linux-samsung-soc@vger.kernel.org, hyunki00.koo@gmail.com, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, linux-kernel@vger.kernel.org, Krzysztof Kozlowski <krzk@kernel.org>, Kukjin Kim <kgene@kernel.org>, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, Jiri Slaby <jslaby@suse.com>, Hyunki Koo <hyunki00.koo@samsung.com> Subject: [PATCH] tty: samsung_tty: 32-bit access for TX/RX hold registers Date: Wed, 1 Apr 2020 17:27:20 +0900 [thread overview] Message-ID: <20200401082721.19431-1-hyunki00.koo@samsung.com> (raw) In-Reply-To: CGME20200401082749epcas2p2a774da515805bc3f761b6b5a8dc9e3d2@epcas2p2.samsung.com Support 32-bit access for the TX/RX hold registers UTXH and URXH. This is required for some newer SoCs. Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> --- drivers/tty/serial/samsung_tty.c | 76 +++++++++++++++++++++++++++++++++------- 1 file changed, 64 insertions(+), 12 deletions(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index 73f951d65b93..17d2ead7cfe2 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { #define portaddrl(port, reg) \ ((unsigned long *)(unsigned long)((port)->membase + (reg))) -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg))) +static unsigned int rd_reg(struct uart_port *port, int reg) +{ + switch (port->iotype) { + case UPIO_MEM: + return readb_relaxed(portaddr(port, reg)); + case UPIO_MEM32: + return readl_relaxed(portaddr(port, reg)); + default: + return 0; + } + return 0; +} + #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg))) -#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg)) +static void wr_reg(struct uart_port *port, int reg, int val) +{ + switch (port->iotype) { + case UPIO_MEM: + writeb_relaxed(val, portaddr(port, reg)); + break; + case UPIO_MEM32: + writel_relaxed(val, portaddr(port, reg)); + break; + } +} + #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg)) +static void write_buf(struct uart_port *port, int reg, int val) +{ + switch (port->iotype) { + case UPIO_MEM: + writeb(val, portaddr(port, reg)); + break; + case UPIO_MEM32: + writel(val, portaddr(port, reg)); + break; + } +} + /* Byte-order aware bit setting/clearing functions. */ static inline void s3c24xx_set_bit(struct uart_port *port, int idx, @@ -714,7 +749,7 @@ static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport) fifocnt--; uerstat = rd_regl(port, S3C2410_UERSTAT); - ch = rd_regb(port, S3C2410_URXH); + ch = rd_reg(port, S3C2410_URXH); if (port->flags & UPF_CONS_FLOW) { int txe = s3c24xx_serial_txempty_nofifo(port); @@ -826,7 +861,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) } if (port->x_char) { - wr_regb(port, S3C2410_UTXH, port->x_char); + wr_reg(port, S3C2410_UTXH, port->x_char); port->icount.tx++; port->x_char = 0; goto out; @@ -852,7 +887,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) break; - wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); + wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); port->icount.tx++; count--; @@ -916,7 +951,7 @@ static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port) /* no modem control lines */ static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) { - unsigned int umstat = rd_regb(port, S3C2410_UMSTAT); + unsigned int umstat = rd_regl(port, S3C2410_UMSTAT); if (umstat & S3C2410_UMSTAT_CTS) return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ -1974,7 +2009,7 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct s3c24xx_uart_port *ourport; int index = probe_index; - int ret; + int ret, prop = 0; if (np) { ret = of_alias_get_id(np, "serial"); @@ -2000,10 +2035,27 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) dev_get_platdata(&pdev->dev) : ourport->drv_data->def_cfg; - if (np) + if (np) { of_property_read_u32(np, "samsung,uart-fifosize", &ourport->port.fifosize); + if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { + switch (prop) { + case 1: + ourport->port.iotype = UPIO_MEM; + break; + case 4: + ourport->port.iotype = UPIO_MEM32; + break; + default: + dev_warn(&pdev->dev, "unsupported reg-io-width (%d)\n", + prop); + ret = -EINVAL; + break; + } + } + } + if (ourport->drv_data->fifosize[index]) ourport->port.fifosize = ourport->drv_data->fifosize[index]; else if (ourport->info->fifosize) @@ -2185,7 +2237,7 @@ static int s3c24xx_serial_get_poll_char(struct uart_port *port) if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0) return NO_POLL_CHAR; - return rd_regb(port, S3C2410_URXH); + return rd_reg(port, S3C2410_URXH); } static void s3c24xx_serial_put_poll_char(struct uart_port *port, @@ -2200,7 +2252,7 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port, while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); - wr_regb(port, S3C2410_UTXH, c); + wr_reg(port, S3C2410_UTXH, c); } #endif /* CONFIG_CONSOLE_POLL */ @@ -2212,7 +2264,7 @@ s3c24xx_serial_console_putchar(struct uart_port *port, int ch) while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); - wr_regb(port, S3C2410_UTXH, ch); + wr_reg(port, S3C2410_UTXH, ch); } static void @@ -2612,7 +2664,7 @@ static void samsung_early_putc(struct uart_port *port, int c) else samsung_early_busyuart(port); - writeb(c, port->membase + S3C2410_UTXH); + write_buf(port, S3C2410_UTXH, c); } static void samsung_early_write(struct console *con, const char *s, -- 2.15.0.rc1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next parent reply other threads:[~2020-04-01 8:27 UTC|newest] Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <CGME20200401082749epcas2p2a774da515805bc3f761b6b5a8dc9e3d2@epcas2p2.samsung.com> 2020-04-01 8:27 ` Hyunki Koo [this message] 2020-04-01 8:27 ` [PATCH] tty: samsung_tty: 32-bit access for TX/RX hold registers Hyunki Koo 2020-04-01 8:55 ` Greg Kroah-Hartman 2020-04-01 8:55 ` Greg Kroah-Hartman 2020-04-01 9:19 ` Krzysztof Kozlowski 2020-04-01 9:19 ` Krzysztof Kozlowski 2020-04-02 9:44 ` Hyunki Koo 2020-04-02 9:44 ` Hyunki Koo 2020-04-02 9:48 ` 'Krzysztof Kozlowski' 2020-04-02 9:48 ` 'Krzysztof Kozlowski' [not found] ` <CGME20200402110609epcas2p4a5ec1fb3a5eaa3b12c20cfc2060162f3@epcas2p4.samsung.com> 2020-04-02 11:04 ` [PATCH v2] " Hyunki Koo 2020-04-02 11:04 ` Hyunki Koo 2020-04-02 12:18 ` Greg KH 2020-04-02 12:18 ` Greg KH 2020-04-02 13:59 ` Krzysztof Kozlowski 2020-04-02 13:59 ` Krzysztof Kozlowski 2020-04-03 7:30 ` Hyunki Koo 2020-04-03 7:30 ` Hyunki Koo 2020-04-03 7:51 ` 'Krzysztof Kozlowski' 2020-04-03 7:51 ` 'Krzysztof Kozlowski' 2020-04-03 10:19 ` Hyunki Koo 2020-04-03 10:19 ` Hyunki Koo [not found] ` <CGME20200403102049epcas2p1d1fe95160b7f37609a8b1710c196cdd8@epcas2p1.samsung.com> 2020-04-03 10:20 ` [PATCH v3] " Hyunki Koo 2020-04-03 10:20 ` Hyunki Koo 2020-04-03 10:47 ` Krzysztof Kozlowski 2020-04-03 10:47 ` Krzysztof Kozlowski 2020-04-03 11:12 ` Hyunki Koo 2020-04-03 11:12 ` Hyunki Koo 2020-04-03 11:39 ` 'Krzysztof Kozlowski' 2020-04-03 11:39 ` 'Krzysztof Kozlowski' [not found] ` <CGME20200403111520epcas2p42ef81138693ffaaa281499c7a24e0e48@epcas2p4.samsung.com> 2020-04-03 11:15 ` [PATCH v4] " Hyunki Koo 2020-04-03 11:15 ` Hyunki Koo 2020-04-03 11:42 ` Greg KH 2020-04-03 11:42 ` Greg KH 2020-04-03 11:53 ` Krzysztof Kozlowski 2020-04-03 11:53 ` Krzysztof Kozlowski 2020-04-03 11:57 ` Greg KH 2020-04-03 11:57 ` Greg KH 2020-04-03 12:08 ` Krzysztof Kozlowski 2020-04-03 12:08 ` Krzysztof Kozlowski 2020-04-03 11:59 ` Krzysztof Kozlowski 2020-04-03 11:59 ` Krzysztof Kozlowski 2020-04-05 21:35 ` Hyunki Koo 2020-04-05 21:35 ` Hyunki Koo 2020-04-06 9:54 ` 'Krzysztof Kozlowski' 2020-04-06 9:54 ` 'Krzysztof Kozlowski' 2020-04-03 13:34 ` Krzysztof Kozlowski 2020-04-03 13:34 ` Krzysztof Kozlowski 2020-04-05 21:41 ` Hyunki Koo 2020-04-05 21:41 ` Hyunki Koo 2020-04-06 9:53 ` 'Krzysztof Kozlowski' 2020-04-06 9:53 ` 'Krzysztof Kozlowski' [not found] ` <CGME20200406103158epcas2p2aaf3ef769a232dc28c04cb4ae91373bd@epcas2p2.samsung.com> 2020-04-06 10:31 ` [PATCH v5 2/2] " Hyunki Koo 2020-04-06 10:31 ` Hyunki Koo [not found] ` <CGME20200406103206epcas2p2bf3c65f96d94cc91fcdcd3e6db75e2a3@epcas2p2.samsung.com> 2020-04-06 10:31 ` [PATCH v5 1/2] dt-bindings: serial: Add reg-io-width compatible Hyunki Koo 2020-04-06 10:47 ` Krzysztof Kozlowski 2020-04-06 10:34 ` [PATCH v5 2/2] tty: samsung_tty: 32-bit access for TX/RX hold registers Krzysztof Kozlowski 2020-04-06 10:34 ` Krzysztof Kozlowski [not found] ` <CGME20200406230902epcas2p19a8df6805dac59968d664efb9bc9419b@epcas2p1.samsung.com> 2020-04-06 23:08 ` [PATCH v6 " Hyunki Koo 2020-04-06 23:08 ` Hyunki Koo [not found] ` <CGME20200406230906epcas2p3f5703f7f9f00cd1cf7dbe5cfd304481f@epcas2p3.samsung.com> 2020-04-06 23:08 ` [PATCH v6 1/2] dt-bindings: serial: Add reg-io-width compatible Hyunki Koo 2020-04-07 6:25 ` Krzysztof Kozlowski 2020-04-09 23:05 ` Rob Herring 2020-04-09 23:09 ` Rob Herring 2020-04-07 4:49 ` [PATCH v6 2/2] tty: samsung_tty: 32-bit access for TX/RX hold registers Jiri Slaby 2020-04-07 4:49 ` Jiri Slaby 2020-04-07 6:02 ` Hyunki Koo 2020-04-07 6:02 ` Hyunki Koo 2020-04-07 6:24 ` Krzysztof Kozlowski 2020-04-07 6:24 ` Krzysztof Kozlowski 2020-04-07 6:32 ` Jiri Slaby 2020-04-07 6:32 ` Jiri Slaby 2020-04-07 7:22 ` Krzysztof Kozlowski 2020-04-07 7:22 ` Krzysztof Kozlowski 2020-04-07 6:26 ` Krzysztof Kozlowski 2020-04-07 6:26 ` Krzysztof Kozlowski 2020-04-07 6:28 ` Jiri Slaby 2020-04-07 6:28 ` Jiri Slaby 2020-04-07 6:37 ` Jiri Slaby 2020-04-07 6:37 ` Jiri Slaby 2020-04-07 6:54 ` Hyunki Koo 2020-04-07 6:54 ` Hyunki Koo
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