From: Andrew Jones <drjones@redhat.com> To: pbonzini@redhat.com Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, Eric Auger <eric.auger@redhat.com>, Zenghui Yu <yuzenghui@huawei.com> Subject: [PULL kvm-unit-tests 31/39] arm/arm64: gicv3: Set the LPI config and pending tables Date: Sat, 4 Apr 2020 16:37:23 +0200 [thread overview] Message-ID: <20200404143731.208138-32-drjones@redhat.com> (raw) In-Reply-To: <20200404143731.208138-1-drjones@redhat.com> From: Eric Auger <eric.auger@redhat.com> Allocate the LPI configuration and per re-distributor pending table. Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled by default in the config table. Also introduce a helper routine that allows to set the pending table bit for a given LPI and macros to set/get its configuration. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Andrew Jones <drjones@redhat.com> --- lib/arm/asm/gic-v3.h | 17 ++++++++++++++ lib/arm/gic-v3.c | 53 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h index 47df05159ac8..fedffa8e0843 100644 --- a/lib/arm/asm/gic-v3.h +++ b/lib/arm/asm/gic-v3.h @@ -50,6 +50,13 @@ #define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \ (MPIDR_AFFINITY_LEVEL(cluster_id, level) << ICC_SGI1R_AFFINITY_## level ## _SHIFT) +#define GICR_PENDBASER_PTZ BIT_ULL(62) + +#define LPI_PROP_GROUP1 (1 << 1) +#define LPI_PROP_ENABLED (1 << 0) +#define LPI_PROP_DEFAULT_PRIO 0xa0 +#define LPI_PROP_DEFAULT (LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | LPI_PROP_ENABLED) + #include <asm/arch_gicv3.h> #ifndef __ASSEMBLY__ @@ -66,6 +73,8 @@ struct gicv3_data { void *dist_base; void *redist_bases[GICV3_NR_REDISTS]; void *redist_base[NR_CPUS]; + u8 *lpi_prop; + void *lpi_pend[NR_CPUS]; unsigned int irq_nr; }; extern struct gicv3_data gicv3_data; @@ -82,6 +91,8 @@ extern void gicv3_write_eoir(u32 irqstat); extern void gicv3_ipi_send_single(int irq, int cpu); extern void gicv3_ipi_send_mask(int irq, const cpumask_t *dest); extern void gicv3_set_redist_base(size_t stride); +extern void gicv3_lpi_set_clr_pending(int rdist, int n, bool set); +extern void gicv3_lpi_alloc_tables(void); static inline void gicv3_do_wait_for_rwp(void *base) { @@ -127,5 +138,11 @@ static inline u64 mpidr_uncompress(u32 compressed) return mpidr; } +#define gicv3_lpi_set_config(intid, value) ({ \ + gicv3_data.lpi_prop[LPI_OFFSET(intid)] = value; \ +}) + +#define gicv3_lpi_get_config(intid) (gicv3_data.lpi_prop[LPI_OFFSET(intid)]) + #endif /* !__ASSEMBLY__ */ #endif /* _ASMARM_GIC_V3_H_ */ diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c index feecb5e67caf..6cf1d1d27340 100644 --- a/lib/arm/gic-v3.c +++ b/lib/arm/gic-v3.c @@ -5,6 +5,7 @@ */ #include <asm/gic.h> #include <asm/io.h> +#include <alloc_page.h> void gicv3_set_redist_base(size_t stride) { @@ -147,3 +148,55 @@ void gicv3_ipi_send_single(int irq, int cpu) cpumask_set_cpu(cpu, &dest); gicv3_ipi_send_mask(irq, &dest); } + +#if defined(__aarch64__) + +/* + * alloc_lpi_tables - Allocate LPI config and pending tables + * and set PROPBASER (shared by all rdistributors) and per + * redistributor PENDBASER. + * + * gicv3_set_redist_base() must be called before + */ +void gicv3_lpi_alloc_tables(void) +{ + unsigned long n = SZ_64K >> PAGE_SHIFT; + unsigned long order = fls(n); + u64 prop_val; + int cpu; + + assert(gicv3_redist_base()); + + gicv3_data.lpi_prop = alloc_pages(order); + + /* ID bits = 13, ie. up to 14b LPI INTID */ + prop_val = (u64)(virt_to_phys(gicv3_data.lpi_prop)) | 13; + + for_each_present_cpu(cpu) { + u64 pend_val; + void *ptr; + + ptr = gicv3_data.redist_base[cpu]; + + writeq(prop_val, ptr + GICR_PROPBASER); + + gicv3_data.lpi_pend[cpu] = alloc_pages(order); + pend_val = (u64)(virt_to_phys(gicv3_data.lpi_pend[cpu])); + writeq(pend_val, ptr + GICR_PENDBASER); + } +} + +void gicv3_lpi_set_clr_pending(int rdist, int n, bool set) +{ + u8 *ptr = gicv3_data.lpi_pend[rdist]; + u8 mask = 1 << (n % 8), byte; + + ptr += (n / 8); + byte = *ptr; + if (set) + byte |= mask; + else + byte &= ~mask; + *ptr = byte; +} +#endif /* __aarch64__ */ -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <drjones@redhat.com> To: pbonzini@redhat.com Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Subject: [PULL kvm-unit-tests 31/39] arm/arm64: gicv3: Set the LPI config and pending tables Date: Sat, 4 Apr 2020 16:37:23 +0200 [thread overview] Message-ID: <20200404143731.208138-32-drjones@redhat.com> (raw) In-Reply-To: <20200404143731.208138-1-drjones@redhat.com> From: Eric Auger <eric.auger@redhat.com> Allocate the LPI configuration and per re-distributor pending table. Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled by default in the config table. Also introduce a helper routine that allows to set the pending table bit for a given LPI and macros to set/get its configuration. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Andrew Jones <drjones@redhat.com> --- lib/arm/asm/gic-v3.h | 17 ++++++++++++++ lib/arm/gic-v3.c | 53 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h index 47df05159ac8..fedffa8e0843 100644 --- a/lib/arm/asm/gic-v3.h +++ b/lib/arm/asm/gic-v3.h @@ -50,6 +50,13 @@ #define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \ (MPIDR_AFFINITY_LEVEL(cluster_id, level) << ICC_SGI1R_AFFINITY_## level ## _SHIFT) +#define GICR_PENDBASER_PTZ BIT_ULL(62) + +#define LPI_PROP_GROUP1 (1 << 1) +#define LPI_PROP_ENABLED (1 << 0) +#define LPI_PROP_DEFAULT_PRIO 0xa0 +#define LPI_PROP_DEFAULT (LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | LPI_PROP_ENABLED) + #include <asm/arch_gicv3.h> #ifndef __ASSEMBLY__ @@ -66,6 +73,8 @@ struct gicv3_data { void *dist_base; void *redist_bases[GICV3_NR_REDISTS]; void *redist_base[NR_CPUS]; + u8 *lpi_prop; + void *lpi_pend[NR_CPUS]; unsigned int irq_nr; }; extern struct gicv3_data gicv3_data; @@ -82,6 +91,8 @@ extern void gicv3_write_eoir(u32 irqstat); extern void gicv3_ipi_send_single(int irq, int cpu); extern void gicv3_ipi_send_mask(int irq, const cpumask_t *dest); extern void gicv3_set_redist_base(size_t stride); +extern void gicv3_lpi_set_clr_pending(int rdist, int n, bool set); +extern void gicv3_lpi_alloc_tables(void); static inline void gicv3_do_wait_for_rwp(void *base) { @@ -127,5 +138,11 @@ static inline u64 mpidr_uncompress(u32 compressed) return mpidr; } +#define gicv3_lpi_set_config(intid, value) ({ \ + gicv3_data.lpi_prop[LPI_OFFSET(intid)] = value; \ +}) + +#define gicv3_lpi_get_config(intid) (gicv3_data.lpi_prop[LPI_OFFSET(intid)]) + #endif /* !__ASSEMBLY__ */ #endif /* _ASMARM_GIC_V3_H_ */ diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c index feecb5e67caf..6cf1d1d27340 100644 --- a/lib/arm/gic-v3.c +++ b/lib/arm/gic-v3.c @@ -5,6 +5,7 @@ */ #include <asm/gic.h> #include <asm/io.h> +#include <alloc_page.h> void gicv3_set_redist_base(size_t stride) { @@ -147,3 +148,55 @@ void gicv3_ipi_send_single(int irq, int cpu) cpumask_set_cpu(cpu, &dest); gicv3_ipi_send_mask(irq, &dest); } + +#if defined(__aarch64__) + +/* + * alloc_lpi_tables - Allocate LPI config and pending tables + * and set PROPBASER (shared by all rdistributors) and per + * redistributor PENDBASER. + * + * gicv3_set_redist_base() must be called before + */ +void gicv3_lpi_alloc_tables(void) +{ + unsigned long n = SZ_64K >> PAGE_SHIFT; + unsigned long order = fls(n); + u64 prop_val; + int cpu; + + assert(gicv3_redist_base()); + + gicv3_data.lpi_prop = alloc_pages(order); + + /* ID bits = 13, ie. up to 14b LPI INTID */ + prop_val = (u64)(virt_to_phys(gicv3_data.lpi_prop)) | 13; + + for_each_present_cpu(cpu) { + u64 pend_val; + void *ptr; + + ptr = gicv3_data.redist_base[cpu]; + + writeq(prop_val, ptr + GICR_PROPBASER); + + gicv3_data.lpi_pend[cpu] = alloc_pages(order); + pend_val = (u64)(virt_to_phys(gicv3_data.lpi_pend[cpu])); + writeq(pend_val, ptr + GICR_PENDBASER); + } +} + +void gicv3_lpi_set_clr_pending(int rdist, int n, bool set) +{ + u8 *ptr = gicv3_data.lpi_pend[rdist]; + u8 mask = 1 << (n % 8), byte; + + ptr += (n / 8); + byte = *ptr; + if (set) + byte |= mask; + else + byte &= ~mask; + *ptr = byte; +} +#endif /* __aarch64__ */ -- 2.25.1 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2020-04-04 14:39 UTC|newest] Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-04 14:36 [PULL kvm-unit-tests 00/39] arm/arm64: The old and new Andrew Jones 2020-04-04 14:36 ` Andrew Jones 2020-04-04 14:36 ` [PULL kvm-unit-tests 01/39] Makefile: Use no-stack-protector compiler options Andrew Jones 2020-04-04 14:36 ` Andrew Jones 2020-04-04 14:36 ` [PULL kvm-unit-tests 02/39] arm/arm64: psci: Don't run C code without stack or vectors Andrew Jones 2020-04-04 14:36 ` Andrew Jones 2020-04-04 14:36 ` [PULL kvm-unit-tests 03/39] arm64: timer: Add ISB after register writes Andrew Jones 2020-04-04 14:36 ` Andrew Jones 2020-04-04 14:36 ` [PULL kvm-unit-tests 04/39] arm64: timer: Add ISB before reading the counter value Andrew Jones 2020-04-04 14:36 ` Andrew Jones 2020-04-04 14:36 ` [PULL kvm-unit-tests 05/39] arm64: timer: Make irq_received volatile Andrew Jones 2020-04-04 14:36 ` Andrew Jones 2020-04-04 14:36 ` [PULL kvm-unit-tests 06/39] arm64: timer: EOIR the interrupt after masking the timer Andrew Jones 2020-04-04 14:36 ` Andrew Jones 2020-04-04 14:36 ` [PULL kvm-unit-tests 07/39] arm64: timer: Wait for the GIC to sample timer interrupt state Andrew Jones 2020-04-04 14:36 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 08/39] arm64: timer: Check the " Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 09/39] arm64: timer: Test behavior when timer disabled or masked Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 10/39] arm/arm64: Perform dcache clean + invalidate after turning MMU off Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 11/39] arm/arm64: gic: Move gic_state enumeration to asm/gic.h Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 12/39] arm64: timer: Use the proper RDist register name in GICv3 Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 13/39] arm64: timer: Use existing helpers to access counter/timers Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 14/39] arm64: timer: Speed up gic-timer-state check Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 15/39] arm64: Provide read/write_sysreg_s Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 16/39] arm: pmu: Let pmu tests take a sub-test parameter Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 17/39] arm: pmu: Don't check PMCR.IMP anymore Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 18/39] arm: pmu: Add a pmu struct Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 19/39] arm: pmu: Introduce defines for PMU versions Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 20/39] arm: pmu: Check Required Event Support Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 21/39] arm: pmu: Basic event counter Tests Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 22/39] arm: pmu: Test SW_INCR event count Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 23/39] arm: pmu: Test chained counters Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 24/39] arm: pmu: test 32-bit <-> 64-bit transitions Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 25/39] arm: gic: Introduce gic_irq_set_clr_enable() helper Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 26/39] arm: pmu: Test overflow interrupts Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 27/39] libcflat: Add other size defines Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 28/39] page_alloc: Introduce get_order() Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 29/39] arm/arm64: gic: Introduce setup_irq() helper Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 30/39] arm/arm64: gicv3: Add some re-distributor defines Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` Andrew Jones [this message] 2020-04-04 14:37 ` [PULL kvm-unit-tests 31/39] arm/arm64: gicv3: Set the LPI config and pending tables Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 32/39] arm/arm64: ITS: Introspection tests Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 33/39] arm/arm64: ITS: its_enable_defaults Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 34/39] arm/arm64: ITS: Device and collection Initialization Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 35/39] arm/arm64: ITS: Commands Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 36/39] arm/arm64: ITS: INT functional tests Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 37/39] arm/run: Allow Migration tests Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 38/39] arm/arm64: ITS: migration tests Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-04 14:37 ` [PULL kvm-unit-tests 39/39] arm/arm64: ITS: pending table migration test Andrew Jones 2020-04-04 14:37 ` Andrew Jones 2020-04-07 15:28 ` [PULL kvm-unit-tests 00/39] arm/arm64: The old and new Paolo Bonzini 2020-04-07 15:28 ` Paolo Bonzini
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