From: "Clément Péron" <peron.clem@gmail.com> To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi <linux-sunxi@googlegroups.com>, "Yangtao Li" <tiny.windzz@gmail.com>, "Clément Péron" <peron.clem@gmail.com> Subject: [PATCH v5 1/9] arm64: dts: allwinner: h6: Add clock to CPU cores Date: Mon, 20 Apr 2020 15:00:13 +0200 [thread overview] Message-ID: <20200420130021.3841-2-peron.clem@gmail.com> (raw) In-Reply-To: <20200420130021.3841-1-peron.clem@gmail.com> From: Yangtao Li <tiny.windzz@gmail.com> The ARM CPU cores are fed by the CPU clock from the CCU. Add a reference to the clock for each CPU core, along with the clock transition latency. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Clément Péron <peron.clem@gmail.com> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index a5ee68388bd3..370e77b86fe1 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -25,6 +25,8 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; cpu1: cpu@1 { @@ -32,6 +34,8 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; cpu2: cpu@2 { @@ -39,6 +43,8 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; cpu3: cpu@3 { @@ -46,6 +52,8 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; }; -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: "Clément Péron" <peron.clem@gmail.com> To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org, "Yangtao Li" <tiny.windzz@gmail.com>, linux-kernel@vger.kernel.org, linux-sunxi <linux-sunxi@googlegroups.com>, "Clément Péron" <peron.clem@gmail.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 1/9] arm64: dts: allwinner: h6: Add clock to CPU cores Date: Mon, 20 Apr 2020 15:00:13 +0200 [thread overview] Message-ID: <20200420130021.3841-2-peron.clem@gmail.com> (raw) In-Reply-To: <20200420130021.3841-1-peron.clem@gmail.com> From: Yangtao Li <tiny.windzz@gmail.com> The ARM CPU cores are fed by the CPU clock from the CCU. Add a reference to the clock for each CPU core, along with the clock transition latency. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Clément Péron <peron.clem@gmail.com> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index a5ee68388bd3..370e77b86fe1 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -25,6 +25,8 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; cpu1: cpu@1 { @@ -32,6 +34,8 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; cpu2: cpu@2 { @@ -39,6 +43,8 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; cpu3: cpu@3 { @@ -46,6 +52,8 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; }; -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-04-20 13:00 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-20 13:00 [PATCH v5 0/9] Add support for Allwinner H6 DVFS Clément Péron 2020-04-20 13:00 ` Clément Péron 2020-04-20 13:00 ` Clément Péron [this message] 2020-04-20 13:00 ` [PATCH v5 1/9] arm64: dts: allwinner: h6: Add clock to CPU cores Clément Péron 2020-04-20 13:00 ` [PATCH v5 2/9] arm64: dts: allwinner: h6: Add thermal trip points/cooling map Clément Péron 2020-04-20 13:00 ` Clément Péron 2020-04-20 13:46 ` Ondřej Jirman 2020-04-20 13:46 ` Ondřej Jirman 2020-04-20 14:20 ` Clément Péron 2020-04-20 14:20 ` Clément Péron 2020-04-20 13:00 ` [PATCH v5 3/9] arm64: dts: allwinner: h6: Add CPU Operating Performance Points table Clément Péron 2020-04-20 13:00 ` Clément Péron 2020-04-20 13:00 ` [PATCH v5 4/9] arm64: configs: Enable sun50i cpufreq nvmem Clément Péron 2020-04-20 13:00 ` Clément Péron 2020-04-20 13:00 ` [PATCH v5 5/9] arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1 Clément Péron 2020-04-20 13:00 ` Clément Péron 2020-04-20 13:00 ` [PATCH v5 6/9] arm64: dts: allwinner: h6: Enable CPU opp tables for Orange Pi 3 Clément Péron 2020-04-20 13:00 ` Clément Péron 2020-04-20 13:00 ` [PATCH v5 7/9] arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6 Clément Péron 2020-04-20 13:00 ` Clément Péron 2020-04-20 13:00 ` [PATCH v5 8/9] arm64: dts: allwinner: Sort Pine H64 device-tree nodes Clément Péron 2020-04-20 13:00 ` Clément Péron 2020-04-20 13:00 ` [PATCH v5 9/9] arm64: dts: allwinner: h6: Enable CPU opp tables for Pine H64 Clément Péron 2020-04-20 13:00 ` Clément Péron 2020-04-20 13:25 ` [PATCH v5 0/9] Add support for Allwinner H6 DVFS Maxime Ripard 2020-04-20 13:25 ` Maxime Ripard
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