From: Catalin Marinas <catalin.marinas@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: Will Deacon <will@kernel.org>, Vincenzo Frascino <vincenzo.frascino@arm.com>, Szabolcs Nagy <szabolcs.nagy@arm.com>, Richard Earnshaw <Richard.Earnshaw@arm.com>, Kevin Brodsky <kevin.brodsky@arm.com>, Andrey Konovalov <andreyknvl@google.com>, Peter Collingbourne <pcc@google.com>, linux-mm@kvack.org, linux-arch@vger.kernel.org, Rob Herring <Rob.Herring@arm.com>, Mark Rutland <mark.rutland@arm.com>, Suzuki K Poulose <Suzuki.Poulose@arm.com> Subject: [PATCH v3 21/23] arm64: mte: Check the DT memory nodes for MTE support Date: Tue, 21 Apr 2020 15:26:01 +0100 [thread overview] Message-ID: <20200421142603.3894-22-catalin.marinas@arm.com> (raw) In-Reply-To: <20200421142603.3894-1-catalin.marinas@arm.com> Even if the ID_AA64PFR1_EL1 register advertises the presence of MTE, it is not guaranteed that the memory system on the SoC supports the feature. In the absence of system-wide MTE support, the behaviour is undefined and the kernel should not enable the MTE memory type in MAIR_EL1. For FDT, add an 'arm,armv8.5-memtag' property to the /memory nodes and check for its presence during MTE probing. For example: memory@80000000 { device_type = "memory"; arm,armv8.5-memtag; reg = <0x00000000 0x80000000 0 0x80000000>, <0x00000008 0x80000000 0 0x80000000>; }; If the /memory nodes are not present in DT or if at least one node does not support MTE, the feature will be disabled. On EFI systems, it is assumed that the memory description matches the EFI memory map (if not, it is considered a firmware bug). MTE is not currently supported on ACPI systems. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Rob Herring <Rob.Herring@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> --- Notes: New in v3. Ongoing (internal) discussions on whether this is the right approach. The issue needs to be solved similarly for ACPI systems. arch/arm64/boot/dts/arm/fvp-base-revc.dts | 1 + arch/arm64/kernel/cpufeature.c | 51 ++++++++++++++++++++++- 2 files changed, 50 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts index 66381d89c1ce..c620a289f15e 100644 --- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts +++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts @@ -94,6 +94,7 @@ memory@80000000 { device_type = "memory"; + arm,armv8.5-memtag; reg = <0x00000000 0x80000000 0 0x80000000>, <0x00000008 0x80000000 0 0x80000000>; }; diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index d2fe8ff72324..a32aad1d5b57 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -7,6 +7,7 @@ #define pr_fmt(fmt) "CPU features: " fmt +#include <linux/acpi.h> #include <linux/bsearch.h> #include <linux/cpumask.h> #include <linux/crash_dump.h> @@ -14,6 +15,7 @@ #include <linux/stop_machine.h> #include <linux/types.h> #include <linux/mm.h> +#include <linux/of.h> #include <linux/cpu.h> #include <asm/cpu.h> #include <asm/cpufeature.h> @@ -1412,6 +1414,51 @@ static bool can_use_gic_priorities(const struct arm64_cpu_capabilities *entry, #endif #ifdef CONFIG_ARM64_MTE +static bool has_usable_mte(const struct arm64_cpu_capabilities *entry, + int scope) +{ + struct device_node *np; + bool memory_checked = false; + bool mte_capable = true; + + if (!has_cpuid_feature(entry, scope)) + return false; + + /* + * If !SCOPE_SYSTEM, return true as per the above CPUID check (late + * CPU bring-up/hotplug). Otherwise, perform addtional checks on the + * system memory MTE support. + */ + if (scope != SCOPE_SYSTEM) + return true; + + if (!acpi_disabled) { + pr_warn("MTE not supported on ACPI systems\n"); + return false; + } + + /* check the "memory" nodes for MTE support */ + for_each_node_by_type(np, "memory") { + memory_checked = true; + mte_capable &= of_property_read_bool(np, "arm,armv8.5-memtag"); + } + + if (!memory_checked || !mte_capable) { + pr_warn("System memory is not MTE-capable\n"); + return false; + } + + return true; +} + +static bool has_hwcap_mte(const struct arm64_cpu_capabilities *entry, + int scope) +{ + if (scope == SCOPE_SYSTEM) + return system_supports_mte(); + return this_cpu_has_cap(ARM64_MTE); +} + static void cpu_enable_mte(struct arm64_cpu_capabilities const *cap) { u64 mair; @@ -1828,7 +1875,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .desc = "Memory Tagging Extension", .capability = ARM64_MTE, .type = ARM64_CPUCAP_SYSTEM_FEATURE, - .matches = has_cpuid_feature, + .matches = has_usable_mte, .sys_reg = SYS_ID_AA64PFR1_EL1, .field_pos = ID_AA64PFR1_MTE_SHIFT, .min_field_value = ID_AA64PFR1_MTE, @@ -1950,7 +1997,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { HWCAP_MULTI_CAP(ptr_auth_hwcap_gen_matches, CAP_HWCAP, KERNEL_HWCAP_PACG), #endif #ifdef CONFIG_ARM64_MTE - HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE, CAP_HWCAP, KERNEL_HWCAP_MTE), + HWCAP_CAP_MATCH(has_hwcap_mte, CAP_HWCAP, KERNEL_HWCAP_MTE), #endif /* CONFIG_ARM64_MTE */ {}, };
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: linux-arch@vger.kernel.org, Richard Earnshaw <Richard.Earnshaw@arm.com>, Suzuki K Poulose <Suzuki.Poulose@arm.com>, Szabolcs Nagy <szabolcs.nagy@arm.com>, Andrey Konovalov <andreyknvl@google.com>, Kevin Brodsky <kevin.brodsky@arm.com>, Rob Herring <Rob.Herring@arm.com>, Peter Collingbourne <pcc@google.com>, linux-mm@kvack.org, Mark Rutland <mark.rutland@arm.com>, Vincenzo Frascino <vincenzo.frascino@arm.com>, Will Deacon <will@kernel.org> Subject: [PATCH v3 21/23] arm64: mte: Check the DT memory nodes for MTE support Date: Tue, 21 Apr 2020 15:26:01 +0100 [thread overview] Message-ID: <20200421142603.3894-22-catalin.marinas@arm.com> (raw) In-Reply-To: <20200421142603.3894-1-catalin.marinas@arm.com> Even if the ID_AA64PFR1_EL1 register advertises the presence of MTE, it is not guaranteed that the memory system on the SoC supports the feature. In the absence of system-wide MTE support, the behaviour is undefined and the kernel should not enable the MTE memory type in MAIR_EL1. For FDT, add an 'arm,armv8.5-memtag' property to the /memory nodes and check for its presence during MTE probing. For example: memory@80000000 { device_type = "memory"; arm,armv8.5-memtag; reg = <0x00000000 0x80000000 0 0x80000000>, <0x00000008 0x80000000 0 0x80000000>; }; If the /memory nodes are not present in DT or if at least one node does not support MTE, the feature will be disabled. On EFI systems, it is assumed that the memory description matches the EFI memory map (if not, it is considered a firmware bug). MTE is not currently supported on ACPI systems. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Rob Herring <Rob.Herring@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> --- Notes: New in v3. Ongoing (internal) discussions on whether this is the right approach. The issue needs to be solved similarly for ACPI systems. arch/arm64/boot/dts/arm/fvp-base-revc.dts | 1 + arch/arm64/kernel/cpufeature.c | 51 ++++++++++++++++++++++- 2 files changed, 50 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts index 66381d89c1ce..c620a289f15e 100644 --- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts +++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts @@ -94,6 +94,7 @@ memory@80000000 { device_type = "memory"; + arm,armv8.5-memtag; reg = <0x00000000 0x80000000 0 0x80000000>, <0x00000008 0x80000000 0 0x80000000>; }; diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index d2fe8ff72324..a32aad1d5b57 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -7,6 +7,7 @@ #define pr_fmt(fmt) "CPU features: " fmt +#include <linux/acpi.h> #include <linux/bsearch.h> #include <linux/cpumask.h> #include <linux/crash_dump.h> @@ -14,6 +15,7 @@ #include <linux/stop_machine.h> #include <linux/types.h> #include <linux/mm.h> +#include <linux/of.h> #include <linux/cpu.h> #include <asm/cpu.h> #include <asm/cpufeature.h> @@ -1412,6 +1414,51 @@ static bool can_use_gic_priorities(const struct arm64_cpu_capabilities *entry, #endif #ifdef CONFIG_ARM64_MTE +static bool has_usable_mte(const struct arm64_cpu_capabilities *entry, + int scope) +{ + struct device_node *np; + bool memory_checked = false; + bool mte_capable = true; + + if (!has_cpuid_feature(entry, scope)) + return false; + + /* + * If !SCOPE_SYSTEM, return true as per the above CPUID check (late + * CPU bring-up/hotplug). Otherwise, perform addtional checks on the + * system memory MTE support. + */ + if (scope != SCOPE_SYSTEM) + return true; + + if (!acpi_disabled) { + pr_warn("MTE not supported on ACPI systems\n"); + return false; + } + + /* check the "memory" nodes for MTE support */ + for_each_node_by_type(np, "memory") { + memory_checked = true; + mte_capable &= of_property_read_bool(np, "arm,armv8.5-memtag"); + } + + if (!memory_checked || !mte_capable) { + pr_warn("System memory is not MTE-capable\n"); + return false; + } + + return true; +} + +static bool has_hwcap_mte(const struct arm64_cpu_capabilities *entry, + int scope) +{ + if (scope == SCOPE_SYSTEM) + return system_supports_mte(); + return this_cpu_has_cap(ARM64_MTE); +} + static void cpu_enable_mte(struct arm64_cpu_capabilities const *cap) { u64 mair; @@ -1828,7 +1875,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .desc = "Memory Tagging Extension", .capability = ARM64_MTE, .type = ARM64_CPUCAP_SYSTEM_FEATURE, - .matches = has_cpuid_feature, + .matches = has_usable_mte, .sys_reg = SYS_ID_AA64PFR1_EL1, .field_pos = ID_AA64PFR1_MTE_SHIFT, .min_field_value = ID_AA64PFR1_MTE, @@ -1950,7 +1997,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { HWCAP_MULTI_CAP(ptr_auth_hwcap_gen_matches, CAP_HWCAP, KERNEL_HWCAP_PACG), #endif #ifdef CONFIG_ARM64_MTE - HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE, CAP_HWCAP, KERNEL_HWCAP_MTE), + HWCAP_CAP_MATCH(has_hwcap_mte, CAP_HWCAP, KERNEL_HWCAP_MTE), #endif /* CONFIG_ARM64_MTE */ {}, }; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-04-21 14:26 UTC|newest] Thread overview: 166+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-21 14:25 [PATCH v3 00/23] arm64: Memory Tagging Extension user-space support Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 01/23] arm64: alternative: Allow alternative_insn to always issue the first instruction Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-27 16:57 ` Dave Martin 2020-04-27 16:57 ` Dave Martin 2020-04-28 11:43 ` Catalin Marinas 2020-04-28 11:43 ` Catalin Marinas 2020-04-29 10:26 ` Dave Martin 2020-04-29 10:26 ` Dave Martin 2020-04-29 14:04 ` Catalin Marinas 2020-04-29 14:04 ` Catalin Marinas 2020-04-29 14:04 ` Catalin Marinas 2020-05-04 14:47 ` Catalin Marinas 2020-05-04 14:47 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 02/23] arm64: mte: system register definitions Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 03/23] arm64: mte: CPU feature detection and initial sysreg configuration Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 04/23] arm64: mte: Use Normal Tagged attributes for the linear map Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 05/23] arm64: mte: Assembler macros and default architecture for .S files Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 06/23] arm64: mte: Tags-aware clear_page() implementation Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 07/23] arm64: mte: Tags-aware copy_page() implementation Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 08/23] arm64: Tags-aware memcmp_pages() implementation Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 09/23] arm64: mte: Add specific SIGSEGV codes Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 10/23] arm64: mte: Handle synchronous and asynchronous tag check faults Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-23 10:38 ` Catalin Marinas 2020-04-23 10:38 ` Catalin Marinas 2020-04-27 16:58 ` Dave Martin 2020-04-27 16:58 ` Dave Martin 2020-04-28 13:43 ` Catalin Marinas 2020-04-28 13:43 ` Catalin Marinas 2020-04-29 10:26 ` Dave Martin 2020-04-29 10:26 ` Dave Martin 2020-04-21 14:25 ` [PATCH v3 11/23] mm: Introduce arch_calc_vm_flag_bits() Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 12/23] arm64: mte: Add PROT_MTE support to mmap() and mprotect() Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 13/23] mm: Introduce arch_validate_flags() Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 14/23] arm64: mte: Validate the PROT_MTE request via arch_validate_flags() Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 15/23] mm: Allow arm64 mmap(PROT_MTE) on RAM-based files Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 16/23] arm64: mte: Allow user control of the tag check mode via prctl() Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 17/23] arm64: mte: Allow user control of the generated random tags " Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-21 14:25 ` [PATCH v3 18/23] arm64: mte: Restore the GCR_EL1 register after a suspend Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-23 15:23 ` Lorenzo Pieralisi 2020-04-23 15:23 ` Lorenzo Pieralisi 2020-04-21 14:25 ` [PATCH v3 19/23] arm64: mte: Add PTRACE_{PEEK,POKE}MTETAGS support Catalin Marinas 2020-04-21 14:25 ` Catalin Marinas 2020-04-24 23:28 ` Peter Collingbourne 2020-04-24 23:28 ` [PATCH v3 19/23] arm64: mte: Add PTRACE_{PEEK, POKE}MTETAGS support Peter Collingbourne 2020-04-24 23:28 ` [PATCH v3 19/23] arm64: mte: Add PTRACE_{PEEK,POKE}MTETAGS support Peter Collingbourne 2020-04-29 10:27 ` Kevin Brodsky 2020-04-29 10:27 ` Kevin Brodsky 2020-04-29 15:24 ` Catalin Marinas 2020-04-29 15:24 ` Catalin Marinas 2020-04-29 16:46 ` Dave Martin 2020-04-29 16:46 ` Dave Martin 2020-04-30 10:21 ` Catalin Marinas 2020-04-30 10:21 ` Catalin Marinas 2020-05-04 16:40 ` Dave Martin 2020-05-04 16:40 ` Dave Martin 2020-05-05 18:03 ` Luis Machado 2020-05-05 18:03 ` Luis Machado 2020-05-12 19:05 ` Luis Machado 2020-05-12 19:05 ` Luis Machado 2020-05-13 10:48 ` Catalin Marinas 2020-05-13 10:48 ` Catalin Marinas 2020-05-13 12:52 ` Luis Machado 2020-05-13 12:52 ` Luis Machado 2020-05-13 14:11 ` Catalin Marinas 2020-05-13 14:11 ` Catalin Marinas 2020-05-13 15:09 ` Luis Machado 2020-05-13 15:09 ` Luis Machado 2020-05-13 16:45 ` Luis Machado 2020-05-13 16:45 ` Luis Machado 2020-05-13 17:11 ` Catalin Marinas 2020-05-13 17:11 ` Catalin Marinas 2020-05-18 16:47 ` Dave Martin 2020-05-18 16:47 ` Dave Martin 2020-05-18 17:12 ` Luis Machado 2020-05-18 17:12 ` Luis Machado 2020-05-19 16:10 ` Catalin Marinas 2020-05-19 16:10 ` Catalin Marinas 2020-04-21 14:26 ` [PATCH v3 20/23] fs: Allow copy_mount_options() to access user-space in a single pass Catalin Marinas 2020-04-21 14:26 ` Catalin Marinas 2020-04-21 15:29 ` Al Viro 2020-04-21 15:29 ` Al Viro 2020-04-21 16:45 ` Catalin Marinas 2020-04-21 16:45 ` Catalin Marinas 2020-04-27 16:56 ` Dave Martin 2020-04-27 16:56 ` Dave Martin 2020-04-28 14:06 ` Catalin Marinas 2020-04-28 14:06 ` Catalin Marinas 2020-04-29 10:28 ` Dave Martin 2020-04-29 10:28 ` Dave Martin 2020-04-28 18:16 ` Kevin Brodsky 2020-04-28 18:16 ` Kevin Brodsky 2020-04-28 19:40 ` Catalin Marinas 2020-04-28 19:40 ` Catalin Marinas 2020-04-29 11:58 ` Catalin Marinas 2020-04-29 11:58 ` Catalin Marinas 2020-04-28 19:36 ` Catalin Marinas 2020-04-28 19:36 ` Catalin Marinas 2020-04-29 10:26 ` Dave Martin 2020-04-29 10:26 ` Dave Martin 2020-04-29 13:52 ` Catalin Marinas 2020-04-29 13:52 ` Catalin Marinas 2020-05-04 16:40 ` Dave Martin 2020-05-04 16:40 ` Dave Martin 2020-04-21 14:26 ` Catalin Marinas [this message] 2020-04-21 14:26 ` [PATCH v3 21/23] arm64: mte: Check the DT memory nodes for MTE support Catalin Marinas 2020-04-24 13:57 ` Catalin Marinas 2020-04-24 13:57 ` Catalin Marinas 2020-04-24 16:17 ` Catalin Marinas 2020-04-24 16:17 ` Catalin Marinas 2020-04-27 11:14 ` Suzuki K Poulose 2020-04-27 11:14 ` Suzuki K Poulose 2020-04-21 14:26 ` [PATCH v3 22/23] arm64: mte: Kconfig entry Catalin Marinas 2020-04-21 14:26 ` Catalin Marinas 2020-04-21 14:26 ` [PATCH v3 23/23] arm64: mte: Add Memory Tagging Extension documentation Catalin Marinas 2020-04-21 14:26 ` Catalin Marinas 2020-04-29 16:47 ` Dave Martin 2020-04-29 16:47 ` Dave Martin 2020-04-30 16:23 ` Catalin Marinas 2020-04-30 16:23 ` Catalin Marinas 2020-05-04 16:46 ` Dave Martin 2020-05-04 16:46 ` Dave Martin 2020-05-11 16:40 ` Catalin Marinas 2020-05-11 16:40 ` Catalin Marinas 2020-05-13 15:48 ` Dave Martin 2020-05-13 15:48 ` Dave Martin 2020-05-14 11:37 ` Catalin Marinas 2020-05-14 11:37 ` Catalin Marinas 2020-05-15 10:38 ` Catalin Marinas 2020-05-15 10:38 ` Catalin Marinas 2020-05-15 11:14 ` Szabolcs Nagy 2020-05-15 11:14 ` Szabolcs Nagy 2020-05-15 11:27 ` Catalin Marinas 2020-05-15 11:27 ` Catalin Marinas 2020-05-15 12:04 ` Szabolcs Nagy 2020-05-15 12:04 ` Szabolcs Nagy 2020-05-15 12:13 ` Catalin Marinas 2020-05-15 12:13 ` Catalin Marinas 2020-05-15 12:53 ` Szabolcs Nagy 2020-05-15 12:53 ` Szabolcs Nagy 2020-05-18 16:52 ` Dave Martin 2020-05-18 16:52 ` Dave Martin 2020-05-18 17:13 ` Catalin Marinas 2020-05-18 17:13 ` Catalin Marinas 2020-05-05 10:32 ` Szabolcs Nagy 2020-05-05 10:32 ` Szabolcs Nagy 2020-05-05 17:30 ` Catalin Marinas 2020-05-05 17:30 ` Catalin Marinas
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