From: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> To: Kever Yang <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>, Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>, Philipp Tomsich <philipp.tomsich-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org> Cc: u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org, Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>, sunil-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org Subject: [PATCH 3/6] clk: rk3399: Set empty for HCLK_SD assigned-clocks Date: Sat, 25 Apr 2020 16:23:16 +0530 [thread overview] Message-ID: <20200425105319.12009-4-jagan@amarulasolutions.com> (raw) In-Reply-To: <20200425105319.12009-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> Due to v5.7-rc1 sync the SD controller nodes in rk3399.dtsi have HCLK_SD assigned-clocks which are usually required for Linux and don't require to handle them in U-Boot. assigned-clocks = <&cru HCLK_SD>; So, mark them as empty in clock otherwise device probe on those SD controllers would fail. Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> --- drivers/clk/rockchip/clk_rk3399.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 1f62376595..d822acace1 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -996,6 +996,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) break; case ACLK_VOP1: case HCLK_VOP1: + case HCLK_SD: /** * assigned-clocks handling won't require for vopl, so * return 0 to satisfy clk_set_defaults during device probe. -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan@amarulasolutions.com> To: u-boot@lists.denx.de Subject: [PATCH 3/6] clk: rk3399: Set empty for HCLK_SD assigned-clocks Date: Sat, 25 Apr 2020 16:23:16 +0530 [thread overview] Message-ID: <20200425105319.12009-4-jagan@amarulasolutions.com> (raw) In-Reply-To: <20200425105319.12009-1-jagan@amarulasolutions.com> Due to v5.7-rc1 sync the SD controller nodes in rk3399.dtsi have HCLK_SD assigned-clocks which are usually required for Linux and don't require to handle them in U-Boot. assigned-clocks = <&cru HCLK_SD>; So, mark them as empty in clock otherwise device probe on those SD controllers would fail. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- drivers/clk/rockchip/clk_rk3399.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 1f62376595..d822acace1 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -996,6 +996,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) break; case ACLK_VOP1: case HCLK_VOP1: + case HCLK_SD: /** * assigned-clocks handling won't require for vopl, so * return 0 to satisfy clk_set_defaults during device probe. -- 2.17.1
next prev parent reply other threads:[~2020-04-25 10:53 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-25 10:53 [PATCH 0/6] rk3399: Sync linux v5.7-rc1 dts(i) Jagan Teki 2020-04-25 10:53 ` Jagan Teki [not found] ` <20200425105319.12009-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> 2020-04-25 10:53 ` [PATCH 1/6] arm64: dts: rk3399-puma: Move u-boot properties into -u-boot.dtsi Jagan Teki 2020-04-25 10:53 ` Jagan Teki 2020-04-25 10:53 ` [PATCH 2/6] arm64: dts: rk3399-evb: " Jagan Teki 2020-04-25 10:53 ` Jagan Teki 2020-04-25 10:53 ` Jagan Teki [this message] 2020-04-25 10:53 ` [PATCH 3/6] clk: rk3399: Set empty for HCLK_SD assigned-clocks Jagan Teki 2020-04-25 10:53 ` [PATCH 4/6] arm64: dts: rk3399: Sync v5.7-rc1 from Linux Jagan Teki 2020-04-25 10:53 ` Jagan Teki 2020-04-25 10:53 ` [PATCH 5/6] arm: dts: rk3399: Sync roc-pc-mezzanine from v5.7-rc1 Jagan Teki 2020-04-25 10:53 ` Jagan Teki 2020-04-25 10:53 ` [PATCH 6/6] rk3399: Add ROC-RK3399-PC Mezzanine board Jagan Teki 2020-04-25 10:53 ` Jagan Teki
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