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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 04/23] drm/i915/rkl: Load DMC firmware for Rocket Lake
Date: Fri,  1 May 2020 10:07:29 -0700	[thread overview]
Message-ID: <20200501170748.358135-5-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20200501170748.358135-1-matthew.d.roper@intel.com>

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_csr.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c
index 3112572cfb7d..319932b03e88 100644
--- a/drivers/gpu/drm/i915/display/intel_csr.c
+++ b/drivers/gpu/drm/i915/display/intel_csr.c
@@ -40,6 +40,10 @@
 
 #define GEN12_CSR_MAX_FW_SIZE		ICL_CSR_MAX_FW_SIZE
 
+#define RKL_CSR_PATH			"i915/rkl_dmc_ver2_01.bin"
+#define RKL_CSR_VERSION_REQUIRED	CSR_VERSION(2, 1)
+MODULE_FIRMWARE(RKL_CSR_PATH);
+
 #define TGL_CSR_PATH			"i915/tgl_dmc_ver2_06.bin"
 #define TGL_CSR_VERSION_REQUIRED	CSR_VERSION(2, 6)
 #define TGL_CSR_MAX_FW_SIZE		0x6000
@@ -682,7 +686,11 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
 	 */
 	intel_csr_runtime_pm_get(dev_priv);
 
-	if (INTEL_GEN(dev_priv) >= 12) {
+	if (IS_ROCKETLAKE(dev_priv)) {
+		csr->fw_path = RKL_CSR_PATH;
+		csr->required_version = RKL_CSR_VERSION_REQUIRED;
+		csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
+	} else if (INTEL_GEN(dev_priv) >= 12) {
 		csr->fw_path = TGL_CSR_PATH;
 		csr->required_version = TGL_CSR_VERSION_REQUIRED;
 		/* Allow to load fw via parameter using the last known size */
-- 
2.24.1

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  parent reply	other threads:[~2020-05-01 17:08 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-01 17:07 [Intel-gfx] [PATCH 00/23] Introduce Rocket Lake Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 01/23] drm/i915/rkl: Add RKL platform info and PCI ids Matt Roper
2020-05-01 18:05   ` Caz Yokoyama
2020-05-01 17:07 ` [Intel-gfx] [PATCH 02/23] x86/gpu: add RKL stolen memory support Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 03/23] drm/i915/rkl: Re-use TGL GuC/HuC firmware Matt Roper
2020-05-01 17:16   ` Srivatsa, Anusha
2020-05-01 17:07 ` Matt Roper [this message]
2020-05-01 17:32   ` [Intel-gfx] [PATCH 04/23] drm/i915/rkl: Load DMC firmware for Rocket Lake Srivatsa, Anusha
2020-05-01 17:07 ` [Intel-gfx] [PATCH 05/23] drm/i915/rkl: Add PCH support Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 06/23] drm/i915/rkl: Update memory bandwidth parameters Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 07/23] drm/i915/rkl: Limit number of universal planes to 5 Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 08/23] drm/i915/rkl: Add power well support Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 09/23] drm/i915/rkl: Program BW_BUDDY0 registers instead of BW_BUDDY1/2 Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 10/23] drm/i915/rkl: RKL only uses PHY_MISC for PHY's A and B Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 11/23] drm/i915/rkl: Add cdclk support Matt Roper
2020-05-02 16:26   ` Khor, Swee Aun
2020-05-04 17:33     ` Matt Roper
2020-05-04 20:20       ` Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 12/23] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout Matt Roper
2020-05-04 20:34   ` [Intel-gfx] [PATCH v2] " Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 13/23] drm/i915/rkl: Check proper SDEISR bits for TC1 and TC2 outputs Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 14/23] drm/i915/rkl: Setup ports/phys Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 15/23] drm/i915/rkl: provide port/phy mapping for vbt Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 16/23] drm/i915/rkl: Add DDC pin mapping Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 17/23] drm/i915/rkl: Don't try to access transcoder D Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 18/23] drm/i915/rkl: Don't try to read out DSI transcoders Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 19/23] drm/i915/rkl: Handle comp master/slave relationships for PHYs Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 20/23] drm/i915/rkl: Add DPLL4 support Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 21/23] drm/i915/rkl: Handle HTI Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 22/23] drm/i915/rkl: Disable PSR2 Matt Roper
2020-05-01 17:07 ` [Intel-gfx] [PATCH 23/23] drm/i915/rkl: Add initial workarounds Matt Roper
2020-05-01 17:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Rocket Lake Patchwork
2020-05-01 18:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-05-01 21:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-05-02 17:09 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce Rocket Lake (rev2) Patchwork
2020-05-04 22:08 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce Rocket Lake (rev3) Patchwork

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