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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org
Subject: [PULL v1 03/14] hw/net/xilinx_axienet: Remove unncessary cast
Date: Thu, 14 May 2020 16:13:51 +0200	[thread overview]
Message-ID: <20200514141402.12498-4-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <20200514141402.12498-1-edgar.iglesias@gmail.com>

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Remove unncessary cast, buf is already uint8_t *.
No functional change.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200506082513.18751-4-edgar.iglesias@gmail.com>
---
 hw/net/xilinx_axienet.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
index 84073753d7..c8dfcda3ee 100644
--- a/hw/net/xilinx_axienet.c
+++ b/hw/net/xilinx_axienet.c
@@ -918,7 +918,7 @@ xilinx_axienet_data_stream_push(StreamSlave *obj, uint8_t *buf, size_t size)
         uint16_t csum;
 
         tmp_csum = net_checksum_add(size - start_off,
-                                    (uint8_t *)buf + start_off);
+                                    buf + start_off);
         /* Accumulate the seed.  */
         tmp_csum += s->hdr[2] & 0xffff;
 
-- 
2.20.1



  parent reply	other threads:[~2020-05-14 14:15 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-14 14:13 [PULL v1 00/14] Xilinx queue 2020-05-14 Edgar E. Iglesias
2020-05-14 14:13 ` [PULL v1 01/14] hw/net/xilinx_axienet: Auto-clear PHY Autoneg Edgar E. Iglesias
2020-05-14 14:13 ` [PULL v1 02/14] hw/net/xilinx_axienet: Cleanup stream->push assignment Edgar E. Iglesias
2020-05-14 14:13 ` Edgar E. Iglesias [this message]
2020-05-14 14:13 ` [PULL v1 04/14] hw/dma/xilinx_axidma: Add DMA memory-region property Edgar E. Iglesias
2020-05-14 14:13 ` [PULL v1 05/14] hw/core: stream: Add an end-of-packet flag Edgar E. Iglesias
2020-05-14 14:13 ` [PULL v1 06/14] hw/net/xilinx_axienet: Handle fragmented packets from DMA Edgar E. Iglesias
2020-05-14 14:13 ` [PULL v1 07/14] hw/dma/xilinx_axidma: mm2s: Stream descriptor by descriptor Edgar E. Iglesias
2020-05-14 14:13 ` [PULL v1 08/14] hw/dma/xilinx_axidma: s2mm: Support stream fragments Edgar E. Iglesias
2020-05-14 14:13 ` [PULL v1 09/14] MAINTAINERS: Add myself as streams maintainer Edgar E. Iglesias
2020-05-14 14:13 ` [PULL v1 10/14] target/microblaze: Add MFS Rd,EDR translation Edgar E. Iglesias
2020-05-14 14:13 ` [PULL v1 11/14] target/microblaze: Fix FPU2 instruction check Edgar E. Iglesias
2020-05-14 14:14 ` [PULL v1 12/14] target/microblaze: gdb: Extend the number of registers presented to GDB Edgar E. Iglesias
2020-05-14 14:14 ` [PULL v1 13/14] target/microblaze: gdb: Fix incorrect SReg reporting Edgar E. Iglesias
2020-05-14 14:14 ` [PULL v1 14/14] target/microblaze: monitor: Increase the number of registers reported Edgar E. Iglesias
2020-05-14 15:17 ` [PULL v1 00/14] Xilinx queue 2020-05-14 Peter Maydell

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