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From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Cc: Pratyush Yadav <p.yadav@ti.com>, Sekhar Nori <nsekhar@ti.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Mason Yang <masonccyang@mxic.com.tw>
Subject: [PATCH v5 12/19] mtd: spi-nor: core: enable octal DTR mode when possible
Date: Tue, 19 May 2020 19:56:34 +0530	[thread overview]
Message-ID: <20200519142642.24131-13-p.yadav@ti.com> (raw)
In-Reply-To: <20200519142642.24131-1-p.yadav@ti.com>

Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/mtd/spi-nor/core.c | 35 +++++++++++++++++++++++++++++++++++
 drivers/mtd/spi-nor/core.h |  2 ++
 2 files changed, 37 insertions(+)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 5cb7e391cd29..a94376344be5 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3097,6 +3097,35 @@ static int spi_nor_init_params(struct spi_nor *nor)
 	return 0;
 }
 
+/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
+ * @nor:                 pointer to a 'struct spi_nor'
+ * @enable:              whether to enable or disable Octal DTR
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
+{
+	int ret;
+
+	if (!nor->params->octal_dtr_enable)
+		return 0;
+
+	if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
+	      nor->write_proto == SNOR_PROTO_8_8_8_DTR))
+		return 0;
+
+	ret = nor->params->octal_dtr_enable(nor, enable);
+	if (ret)
+		return ret;
+
+	if (enable)
+		nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
+	else
+		nor->reg_proto = SNOR_PROTO_1_1_1;
+
+	return 0;
+}
+
 /**
  * spi_nor_quad_enable() - enable Quad I/O if needed.
  * @nor:                pointer to a 'struct spi_nor'
@@ -3136,6 +3165,12 @@ static int spi_nor_init(struct spi_nor *nor)
 {
 	int err;
 
+	err = spi_nor_octal_dtr_enable(nor, true);
+	if (err) {
+		dev_dbg(nor->dev, "octal mode not supported\n");
+		return err;
+	}
+
 	err = spi_nor_quad_enable(nor);
 	if (err) {
 		dev_dbg(nor->dev, "quad mode not supported\n");
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 7e6df8322da0..6338d32a0d77 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -203,6 +203,7 @@ struct spi_nor_locking_ops {
  *                      higher index in the array, the higher priority.
  * @erase_map:		the erase map parsed from the SFDP Sector Map Parameter
  *                      Table.
+ * @octal_dtr_enable:	enables SPI NOR octal DTR mode.
  * @quad_enable:	enables SPI NOR quad mode.
  * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
  * @convert_addr:	converts an absolute address into something the flash
@@ -226,6 +227,7 @@ struct spi_nor_flash_parameter {
 
 	struct spi_nor_erase_map        erase_map;
 
+	int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
 	int (*quad_enable)(struct spi_nor *nor);
 	int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
 	u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
-- 
2.26.2


WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Cc: Mason Yang <masonccyang@mxic.com.tw>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Sekhar Nori <nsekhar@ti.com>, Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH v5 12/19] mtd: spi-nor: core: enable octal DTR mode when possible
Date: Tue, 19 May 2020 19:56:34 +0530	[thread overview]
Message-ID: <20200519142642.24131-13-p.yadav@ti.com> (raw)
In-Reply-To: <20200519142642.24131-1-p.yadav@ti.com>

Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/mtd/spi-nor/core.c | 35 +++++++++++++++++++++++++++++++++++
 drivers/mtd/spi-nor/core.h |  2 ++
 2 files changed, 37 insertions(+)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 5cb7e391cd29..a94376344be5 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3097,6 +3097,35 @@ static int spi_nor_init_params(struct spi_nor *nor)
 	return 0;
 }
 
+/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
+ * @nor:                 pointer to a 'struct spi_nor'
+ * @enable:              whether to enable or disable Octal DTR
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
+{
+	int ret;
+
+	if (!nor->params->octal_dtr_enable)
+		return 0;
+
+	if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
+	      nor->write_proto == SNOR_PROTO_8_8_8_DTR))
+		return 0;
+
+	ret = nor->params->octal_dtr_enable(nor, enable);
+	if (ret)
+		return ret;
+
+	if (enable)
+		nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
+	else
+		nor->reg_proto = SNOR_PROTO_1_1_1;
+
+	return 0;
+}
+
 /**
  * spi_nor_quad_enable() - enable Quad I/O if needed.
  * @nor:                pointer to a 'struct spi_nor'
@@ -3136,6 +3165,12 @@ static int spi_nor_init(struct spi_nor *nor)
 {
 	int err;
 
+	err = spi_nor_octal_dtr_enable(nor, true);
+	if (err) {
+		dev_dbg(nor->dev, "octal mode not supported\n");
+		return err;
+	}
+
 	err = spi_nor_quad_enable(nor);
 	if (err) {
 		dev_dbg(nor->dev, "quad mode not supported\n");
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 7e6df8322da0..6338d32a0d77 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -203,6 +203,7 @@ struct spi_nor_locking_ops {
  *                      higher index in the array, the higher priority.
  * @erase_map:		the erase map parsed from the SFDP Sector Map Parameter
  *                      Table.
+ * @octal_dtr_enable:	enables SPI NOR octal DTR mode.
  * @quad_enable:	enables SPI NOR quad mode.
  * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
  * @convert_addr:	converts an absolute address into something the flash
@@ -226,6 +227,7 @@ struct spi_nor_flash_parameter {
 
 	struct spi_nor_erase_map        erase_map;
 
+	int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
 	int (*quad_enable)(struct spi_nor *nor);
 	int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
 	u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
-- 
2.26.2


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Cc: Mason Yang <masonccyang@mxic.com.tw>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Sekhar Nori <nsekhar@ti.com>, Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH v5 12/19] mtd: spi-nor: core: enable octal DTR mode when possible
Date: Tue, 19 May 2020 19:56:34 +0530	[thread overview]
Message-ID: <20200519142642.24131-13-p.yadav@ti.com> (raw)
In-Reply-To: <20200519142642.24131-1-p.yadav@ti.com>

Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/mtd/spi-nor/core.c | 35 +++++++++++++++++++++++++++++++++++
 drivers/mtd/spi-nor/core.h |  2 ++
 2 files changed, 37 insertions(+)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 5cb7e391cd29..a94376344be5 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3097,6 +3097,35 @@ static int spi_nor_init_params(struct spi_nor *nor)
 	return 0;
 }
 
+/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
+ * @nor:                 pointer to a 'struct spi_nor'
+ * @enable:              whether to enable or disable Octal DTR
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
+{
+	int ret;
+
+	if (!nor->params->octal_dtr_enable)
+		return 0;
+
+	if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
+	      nor->write_proto == SNOR_PROTO_8_8_8_DTR))
+		return 0;
+
+	ret = nor->params->octal_dtr_enable(nor, enable);
+	if (ret)
+		return ret;
+
+	if (enable)
+		nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
+	else
+		nor->reg_proto = SNOR_PROTO_1_1_1;
+
+	return 0;
+}
+
 /**
  * spi_nor_quad_enable() - enable Quad I/O if needed.
  * @nor:                pointer to a 'struct spi_nor'
@@ -3136,6 +3165,12 @@ static int spi_nor_init(struct spi_nor *nor)
 {
 	int err;
 
+	err = spi_nor_octal_dtr_enable(nor, true);
+	if (err) {
+		dev_dbg(nor->dev, "octal mode not supported\n");
+		return err;
+	}
+
 	err = spi_nor_quad_enable(nor);
 	if (err) {
 		dev_dbg(nor->dev, "quad mode not supported\n");
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 7e6df8322da0..6338d32a0d77 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -203,6 +203,7 @@ struct spi_nor_locking_ops {
  *                      higher index in the array, the higher priority.
  * @erase_map:		the erase map parsed from the SFDP Sector Map Parameter
  *                      Table.
+ * @octal_dtr_enable:	enables SPI NOR octal DTR mode.
  * @quad_enable:	enables SPI NOR quad mode.
  * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
  * @convert_addr:	converts an absolute address into something the flash
@@ -226,6 +227,7 @@ struct spi_nor_flash_parameter {
 
 	struct spi_nor_erase_map        erase_map;
 
+	int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
 	int (*quad_enable)(struct spi_nor *nor);
 	int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
 	u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
-- 
2.26.2


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Cc: Mason Yang <masonccyang@mxic.com.tw>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Sekhar Nori <nsekhar@ti.com>, Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH v5 12/19] mtd: spi-nor: core: enable octal DTR mode when possible
Date: Tue, 19 May 2020 19:56:34 +0530	[thread overview]
Message-ID: <20200519142642.24131-13-p.yadav@ti.com> (raw)
In-Reply-To: <20200519142642.24131-1-p.yadav@ti.com>

Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/mtd/spi-nor/core.c | 35 +++++++++++++++++++++++++++++++++++
 drivers/mtd/spi-nor/core.h |  2 ++
 2 files changed, 37 insertions(+)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 5cb7e391cd29..a94376344be5 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3097,6 +3097,35 @@ static int spi_nor_init_params(struct spi_nor *nor)
 	return 0;
 }
 
+/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
+ * @nor:                 pointer to a 'struct spi_nor'
+ * @enable:              whether to enable or disable Octal DTR
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
+{
+	int ret;
+
+	if (!nor->params->octal_dtr_enable)
+		return 0;
+
+	if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
+	      nor->write_proto == SNOR_PROTO_8_8_8_DTR))
+		return 0;
+
+	ret = nor->params->octal_dtr_enable(nor, enable);
+	if (ret)
+		return ret;
+
+	if (enable)
+		nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
+	else
+		nor->reg_proto = SNOR_PROTO_1_1_1;
+
+	return 0;
+}
+
 /**
  * spi_nor_quad_enable() - enable Quad I/O if needed.
  * @nor:                pointer to a 'struct spi_nor'
@@ -3136,6 +3165,12 @@ static int spi_nor_init(struct spi_nor *nor)
 {
 	int err;
 
+	err = spi_nor_octal_dtr_enable(nor, true);
+	if (err) {
+		dev_dbg(nor->dev, "octal mode not supported\n");
+		return err;
+	}
+
 	err = spi_nor_quad_enable(nor);
 	if (err) {
 		dev_dbg(nor->dev, "quad mode not supported\n");
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 7e6df8322da0..6338d32a0d77 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -203,6 +203,7 @@ struct spi_nor_locking_ops {
  *                      higher index in the array, the higher priority.
  * @erase_map:		the erase map parsed from the SFDP Sector Map Parameter
  *                      Table.
+ * @octal_dtr_enable:	enables SPI NOR octal DTR mode.
  * @quad_enable:	enables SPI NOR quad mode.
  * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
  * @convert_addr:	converts an absolute address into something the flash
@@ -226,6 +227,7 @@ struct spi_nor_flash_parameter {
 
 	struct spi_nor_erase_map        erase_map;
 
+	int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
 	int (*quad_enable)(struct spi_nor *nor);
 	int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
 	u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
-- 
2.26.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-05-19 14:28 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-19 14:26 [PATCH v5 00/19] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-05-19 14:26 ` Pratyush Yadav
2020-05-19 14:26 ` Pratyush Yadav
2020-05-19 14:26 ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 01/19] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-21  8:27   ` masonccyang
2020-05-21  8:27     ` masonccyang
2020-05-21  8:27     ` masonccyang
2020-05-21  8:27     ` masonccyang
2020-05-22 10:45     ` Pratyush Yadav
2020-05-22 10:45       ` Pratyush Yadav
2020-05-22 10:45       ` Pratyush Yadav
2020-05-22 10:45       ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 02/19] spi: atmel-quadspi: reject DTR ops Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 03/19] spi: spi-mtk-nor: " Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 04/19] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 05/19] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-21  9:24   ` masonccyang
2020-05-21  9:24     ` masonccyang
2020-05-21  9:24     ` masonccyang
2020-05-21  9:24     ` masonccyang
2020-05-21 12:52     ` Pratyush Yadav
2020-05-21 12:52       ` Pratyush Yadav
2020-05-21 12:52       ` Pratyush Yadav
2020-05-21 12:52       ` Pratyush Yadav
2020-05-22  6:30   ` masonccyang
2020-05-22  6:30     ` masonccyang
2020-05-22  6:30     ` masonccyang
2020-05-22  6:30     ` masonccyang
2020-05-22  8:37     ` Pratyush Yadav
2020-05-22  8:37       ` Pratyush Yadav
2020-05-22  8:37       ` Pratyush Yadav
2020-05-22  8:37       ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 06/19] mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 07/19] mtd: spi-nor: sfdp: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 08/19] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 09/19] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-20  7:59   ` masonccyang
2020-05-20  7:59     ` masonccyang
2020-05-20  7:59     ` masonccyang
2020-05-20  7:59     ` masonccyang
2020-05-20  8:55     ` Pratyush Yadav
2020-05-20  8:55       ` Pratyush Yadav
2020-05-20  8:55       ` Pratyush Yadav
2020-05-20  8:55       ` Pratyush Yadav
2020-05-20  9:40       ` masonccyang
2020-05-20  9:40         ` masonccyang
2020-05-20  9:40         ` masonccyang
2020-05-20  9:40         ` masonccyang
2020-05-20 10:37         ` Pratyush Yadav
2020-05-20 10:37           ` Pratyush Yadav
2020-05-20 10:37           ` Pratyush Yadav
2020-05-20 10:37           ` Pratyush Yadav
2020-05-21  8:09           ` masonccyang
2020-05-21  8:09             ` masonccyang
2020-05-21  8:09             ` masonccyang
2020-05-21  8:09             ` masonccyang
2020-05-21  9:14             ` Pratyush Yadav
2020-05-21  9:14               ` Pratyush Yadav
2020-05-21  9:14               ` Pratyush Yadav
2020-05-21  9:14               ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 10/19] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 11/19] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` Pratyush Yadav [this message]
2020-05-19 14:26   ` [PATCH v5 12/19] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 13/19] mtd: spi-nor: sfdp: do not make invalid quad enable fatal Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 14/19] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 15/19] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 16/19] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 17/19] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 18/19] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26 ` [PATCH v5 19/19] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav
2020-05-19 14:26   ` Pratyush Yadav

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