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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH 10/12] drm/i915/gem: Lift GPU relocation allocation
Date: Mon, 25 May 2020 08:53:45 +0100	[thread overview]
Message-ID: <20200525075347.582-10-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20200525075347.582-1-chris@chris-wilson.co.uk>

Since we have reduced the relocations paths to just use the async GPU,
we can lift the request allocation to the start of the relocations.
Knowing that we use one request for all relocations will simplify
tracking the relocation fence.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 53 +++++++++----------
 .../i915/gem/selftests/i915_gem_execbuffer.c  |  4 ++
 2 files changed, 29 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index e840b2a85284..903805455af1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -900,8 +900,6 @@ eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle)
 
 static void eb_destroy(const struct i915_execbuffer *eb)
 {
-	GEM_BUG_ON(eb->reloc_cache.rq);
-
 	if (eb->array)
 		eb_vma_array_put(eb->array);
 
@@ -926,7 +924,6 @@ static void reloc_cache_init(struct reloc_cache *cache,
 	cache->has_fence = cache->gen < 4;
 	cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment;
 	cache->node.flags = 0;
-	cache->rq = NULL;
 	cache->target = NULL;
 }
 
@@ -1081,9 +1078,8 @@ static int reloc_move_to_gpu(struct i915_request *rq, struct i915_vma *vma)
 	return err;
 }
 
-static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
-			     struct intel_engine_cs *engine,
-			     unsigned int len)
+static int
+__reloc_gpu_alloc(struct i915_execbuffer *eb, struct intel_engine_cs *engine)
 {
 	struct reloc_cache *cache = &eb->reloc_cache;
 	struct intel_gt_buffer_pool_node *pool;
@@ -1173,11 +1169,6 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
 	return err;
 }
 
-static bool reloc_can_use_engine(const struct intel_engine_cs *engine)
-{
-	return engine->class != VIDEO_DECODE_CLASS || !IS_GEN(engine->i915, 6);
-}
-
 static u32 *reloc_gpu(struct i915_execbuffer *eb,
 		      struct i915_vma *vma,
 		      unsigned int len)
@@ -1186,20 +1177,6 @@ static u32 *reloc_gpu(struct i915_execbuffer *eb,
 	u32 *cmd;
 	int err;
 
-	if (unlikely(!cache->rq)) {
-		struct intel_engine_cs *engine = eb->engine;
-
-		if (!reloc_can_use_engine(engine)) {
-			engine = engine->gt->engine_class[COPY_ENGINE_CLASS][0];
-			if (!engine)
-				return ERR_PTR(-ENODEV);
-		}
-
-		err = __reloc_gpu_alloc(eb, engine, len);
-		if (unlikely(err))
-			return ERR_PTR(err);
-	}
-
 	if (vma != cache->target) {
 		err = reloc_move_to_gpu(cache->rq, vma);
 		if (unlikely(err)) {
@@ -1500,6 +1477,24 @@ static int eb_relocate_vma(struct i915_execbuffer *eb, struct eb_vma *ev)
 	return 0;
 }
 
+static bool reloc_can_use_engine(const struct intel_engine_cs *engine)
+{
+	return engine->class != VIDEO_DECODE_CLASS || !IS_GEN(engine->i915, 6);
+}
+
+static int reloc_gpu_alloc(struct i915_execbuffer *eb)
+{
+	struct intel_engine_cs *engine = eb->engine;
+
+	if (!reloc_can_use_engine(engine)) {
+		engine = engine->gt->engine_class[COPY_ENGINE_CLASS][0];
+		if (!engine)
+			return -ENODEV;
+	}
+
+	return __reloc_gpu_alloc(eb, engine);
+}
+
 static int eb_relocate(struct i915_execbuffer *eb)
 {
 	int err;
@@ -1519,6 +1514,11 @@ static int eb_relocate(struct i915_execbuffer *eb)
 		struct eb_vma *ev;
 		int flush;
 
+		err = reloc_gpu_alloc(eb);
+		if (err)
+			return err;
+		GEM_BUG_ON(!eb->reloc_cache.rq);
+
 		list_for_each_entry(ev, &eb->relocs, reloc_link) {
 			err = eb_relocate_vma(eb, ev);
 			if (err)
@@ -2490,9 +2490,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 		batch = vma;
 	}
 
-	/* All GPU relocation batches must be submitted prior to the user rq */
-	GEM_BUG_ON(eb.reloc_cache.rq);
-
 	/* Allocate a request for this batch buffer nice and early. */
 	eb.request = i915_request_create(eb.context);
 	if (IS_ERR(eb.request)) {
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c
index 57c14d3340cd..f0ec23632a78 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c
@@ -36,6 +36,10 @@ static int __igt_gpu_reloc(struct i915_execbuffer *eb,
 	if (err)
 		return err;
 
+	err = reloc_gpu_alloc(eb);
+	if (err)
+		goto unpin_vma;
+
 	/* 8-Byte aligned */
 	err = __reloc_entry_gpu(eb, vma, offsets[0] * sizeof(u32), 0);
 	if (err)
-- 
2.20.1

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  parent reply	other threads:[~2020-05-25  7:54 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-25  7:53 [Intel-gfx] [PATCH 01/12] drm/i915/gt: Stop cross-polluting PIN_GLOBAL with PIN_USER with no-ppgtt Chris Wilson
2020-05-25  7:53 ` [Intel-gfx] [PATCH 02/12] drm/i915/gt: Cancel the flush worker more thoroughly Chris Wilson
2020-05-25 13:51   ` Mika Kuoppala
2020-05-25 14:08     ` Chris Wilson
2020-05-25  7:53 ` [Intel-gfx] [PATCH 03/12] drm/i915/gem: Suppress some random warnings Chris Wilson
2020-05-25 13:55   ` Mika Kuoppala
2020-05-25  7:53 ` [Intel-gfx] [PATCH 04/12] drm/i915/execlists: Shortcircuit queue_prio() for no internal levels Chris Wilson
2020-05-26 11:17   ` Mika Kuoppala
2020-05-25  7:53 ` [Intel-gfx] [PATCH 05/12] drm/i915: Improve execute_cb struct packing Chris Wilson
2020-05-26 11:17   ` Mika Kuoppala
2020-05-25  7:53 ` [Intel-gfx] [PATCH 06/12] dma-buf: Proxy fence, an unsignaled fence placeholder Chris Wilson
2020-05-30  5:53   ` kbuild test robot
2020-05-30  5:53     ` kbuild test robot
2020-05-25  7:53 ` [Intel-gfx] [PATCH 07/12] drm/i915: Unpeel awaits on a proxy fence Chris Wilson
2020-05-25  7:53 ` [Intel-gfx] [PATCH 08/12] drm/i915: Add list_for_each_entry_safe_continue_reverse Chris Wilson
2020-05-25  7:53 ` [Intel-gfx] [PATCH 09/12] drm/i915/gem: Async GPU relocations only Chris Wilson
2020-05-25  7:53 ` Chris Wilson [this message]
2020-05-25  7:53 ` [Intel-gfx] [PATCH 11/12] drm/i915/gem: Add all GPU reloc awaits/signals en masse Chris Wilson
2020-05-25  7:53 ` [Intel-gfx] [PATCH 12/12] drm/i915/gem: Make relocations atomic within execbuf Chris Wilson
2020-05-25  8:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] drm/i915/gt: Stop cross-polluting PIN_GLOBAL with PIN_USER with no-ppgtt Patchwork
2020-05-25  8:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-05-25  8:24 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-05-25 15:38 ` [Intel-gfx] [PATCH 01/12] " Mika Kuoppala

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