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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH 08/11] drm/i915/gem: Build the reloc request first
Date: Thu, 28 May 2020 08:41:06 +0100	[thread overview]
Message-ID: <20200528074109.28235-8-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20200528074109.28235-1-chris@chris-wilson.co.uk>

If we get interrupted in the middle of chaining up the relocation
entries, we will fail to submit the relocation batch. However, we will
report having already completed some of the relocations, and so the
reloc.presumed_offset will no longer match the batch contents, causing
confusion and invalid future batches. If we build the relocation request
packet first, we can always emit as far as we get up in the relocation
chain.

Fixes: 0e97fbb08055 ("drm/i915/gem: Use a single chained reloc batches for a single execbuf")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 45 +++++++++++--------
 .../i915/gem/selftests/i915_gem_execbuffer.c  |  8 ++--
 2 files changed, 31 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 3fb76d222610..673671cff039 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1019,22 +1019,11 @@ static unsigned int reloc_bb_flags(const struct reloc_cache *cache)
 	return cache->gen > 5 ? 0 : I915_DISPATCH_SECURE;
 }
 
-static int reloc_gpu_flush(struct reloc_cache *cache)
+static int reloc_gpu_emit(struct reloc_cache *cache)
 {
 	struct i915_request *rq = cache->rq;
 	int err;
 
-	if (cache->rq_vma) {
-		struct drm_i915_gem_object *obj = cache->rq_vma->obj;
-
-		GEM_BUG_ON(cache->rq_size >= obj->base.size / sizeof(u32));
-		cache->rq_cmd[cache->rq_size++] = MI_BATCH_BUFFER_END;
-
-		__i915_gem_object_flush_map(obj,
-					    0, sizeof(u32) * cache->rq_size);
-		i915_gem_object_unpin_map(obj);
-	}
-
 	err = 0;
 	if (rq->engine->emit_init_breadcrumb)
 		err = rq->engine->emit_init_breadcrumb(rq);
@@ -1046,10 +1035,26 @@ static int reloc_gpu_flush(struct reloc_cache *cache)
 	if (err)
 		i915_request_set_error_once(rq, err);
 
+	return err;
+}
+
+static void reloc_gpu_flush(struct reloc_cache *cache)
+{
+	struct i915_request *rq = cache->rq;
+
+	if (cache->rq_vma) {
+		struct drm_i915_gem_object *obj = cache->rq_vma->obj;
+
+		GEM_BUG_ON(cache->rq_size >= obj->base.size / sizeof(u32));
+		cache->rq_cmd[cache->rq_size++] = MI_BATCH_BUFFER_END;
+
+		__i915_gem_object_flush_map(obj,
+					    0, sizeof(u32) * cache->rq_size);
+		i915_gem_object_unpin_map(obj);
+	}
+
 	intel_gt_chipset_flush(rq->engine->gt);
 	i915_request_add(rq);
-
-	return err;
 }
 
 static int
@@ -1605,7 +1610,7 @@ static int reloc_gpu_alloc(struct i915_execbuffer *eb)
 static int reloc_gpu(struct i915_execbuffer *eb)
 {
 	struct eb_vma *ev;
-	int flush, err;
+	int err;
 
 	err = reloc_gpu_alloc(eb);
 	if (err)
@@ -1613,19 +1618,21 @@ static int reloc_gpu(struct i915_execbuffer *eb)
 	GEM_BUG_ON(!eb->reloc_cache.rq);
 
 	err = lock_relocs(eb);
+	if (err)
+		return err;
+
+	err = reloc_gpu_emit(&eb->reloc_cache);
 	if (err)
 		goto out;
 
 	list_for_each_entry(ev, &eb->relocs, reloc_link) {
 		err = eb_relocate_vma(eb, ev);
 		if (err)
-			goto out;
+			break;
 	}
 
 out:
-	flush = reloc_gpu_flush(&eb->reloc_cache);
-	if (!err)
-		err = flush;
+	reloc_gpu_flush(&eb->reloc_cache);
 	return err;
 }
 
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c
index d5c1be86b1e6..d14315e04d98 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c
@@ -46,6 +46,10 @@ static int __igt_gpu_reloc(struct i915_execbuffer *eb,
 	if (err)
 		goto unpin_vma;
 
+	err = reloc_gpu_emit(&eb->reloc_cache);
+	if (err)
+		goto unpin_vma;
+
 	/* 8-Byte aligned */
 	err = __reloc_entry_gpu(eb, ev.vma, offsets[0] * sizeof(u32), 0);
 	if (err)
@@ -70,9 +74,7 @@ static int __igt_gpu_reloc(struct i915_execbuffer *eb,
 
 	GEM_BUG_ON(!eb->reloc_cache.rq);
 	rq = i915_request_get(eb->reloc_cache.rq);
-	err = reloc_gpu_flush(&eb->reloc_cache);
-	if (err)
-		goto put_rq;
+	reloc_gpu_flush(&eb->reloc_cache);
 
 	err = i915_gem_object_wait(obj, I915_WAIT_INTERRUPTIBLE, HZ / 2);
 	if (err) {
-- 
2.20.1

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  parent reply	other threads:[~2020-05-28  7:41 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-28  7:40 [Intel-gfx] [PATCH 01/11] drm/i915/gt: Prevent timeslicing into unpreemptable requests Chris Wilson
2020-05-28  7:41 ` [Intel-gfx] [PATCH 02/11] drm/i915/gt: Don't declare hangs if engine is stalled Chris Wilson
2020-05-28  7:41 ` [Intel-gfx] [PATCH 03/11] drm/i915/gem: Async GPU relocations only Chris Wilson
2020-05-28  7:41 ` [Intel-gfx] [PATCH 04/11] drm/i915: Add list_for_each_entry_safe_continue_reverse Chris Wilson
2020-05-28  7:41 ` [Intel-gfx] [PATCH 05/11] drm/i915/gem: Separate reloc validation into an earlier step Chris Wilson
2020-05-28  7:41 ` [Intel-gfx] [PATCH 06/11] drm/i915/gem: Lift GPU relocation allocation Chris Wilson
2020-05-28  7:41 ` [Intel-gfx] [PATCH 07/11] drm/i915/gem: Add all GPU reloc awaits/signals en masse Chris Wilson
2020-05-28  7:41 ` Chris Wilson [this message]
2020-05-28  7:41 ` [Intel-gfx] [PATCH 09/11] dma-buf: Proxy fence, an unsignaled fence placeholder Chris Wilson
2020-05-28  7:41 ` [Intel-gfx] [PATCH 10/11] drm/i915: Unpeel awaits on a proxy fence Chris Wilson
2020-05-28  7:41 ` [Intel-gfx] [PATCH 11/11] drm/i915/gem: Make relocations atomic within execbuf Chris Wilson
2020-05-28  7:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/gt: Prevent timeslicing into unpreemptable requests Patchwork
2020-05-28  7:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-05-28  8:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-05-28 10:38 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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