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From: "Mylène Josserand" <mylene.josserand@collabora.com>
To: mturquette@baylibre.com, sboyd@kernel.org, heiko@sntech.de,
	robh+dt@kernel.org
Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, mylene.josserand@collabora.com,
	kernel@collabora.com
Subject: [PATCH v4 2/2] dt-bindings: clocks: rk3288: add rk3288w compatible
Date: Tue,  2 Jun 2020 10:06:44 +0200	[thread overview]
Message-ID: <20200602080644.11333-3-mylene.josserand@collabora.com> (raw)
In-Reply-To: <20200602080644.11333-1-mylene.josserand@collabora.com>

Add the possible compatible "rockchip,rk3288w-cru" that handles
the difference between the rk3288 and the new revision rk3288w.

This compatible will be added by bootloaders.

Signed-off-by: Mylène Josserand <mylene.josserand@collabora.com>
---
 .../devicetree/bindings/clock/rockchip,rk3288-cru.txt     | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt
index 8cb47c39ba53..bf3a9ec19241 100644
--- a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt
@@ -4,9 +4,15 @@ The RK3288 clock controller generates and supplies clock to various
 controllers within the SoC and also implements a reset controller for SoC
 peripherals.
 
+A revision of this SoC is available: rk3288w. The clock tree is a bit
+different so another dt-compatible is available. Noticed that it is only
+setting the difference but there is no automatic revision detection. This
+should be performed by bootloaders.
+
 Required Properties:
 
-- compatible: should be "rockchip,rk3288-cru"
+- compatible: should be "rockchip,rk3288-cru" or "rockchip,rk3288w-cru" in
+  case of this revision of Rockchip rk3288.
 - reg: physical base address of the controller and length of memory mapped
   region.
 - #clock-cells: should be 1.
-- 
2.26.2


WARNING: multiple messages have this Message-ID (diff)
From: "Mylène Josserand" <mylene.josserand@collabora.com>
To: mturquette@baylibre.com, sboyd@kernel.org, heiko@sntech.de,
	robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, mylene.josserand@collabora.com,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	kernel@collabora.com, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 2/2] dt-bindings: clocks: rk3288: add rk3288w compatible
Date: Tue,  2 Jun 2020 10:06:44 +0200	[thread overview]
Message-ID: <20200602080644.11333-3-mylene.josserand@collabora.com> (raw)
In-Reply-To: <20200602080644.11333-1-mylene.josserand@collabora.com>

Add the possible compatible "rockchip,rk3288w-cru" that handles
the difference between the rk3288 and the new revision rk3288w.

This compatible will be added by bootloaders.

Signed-off-by: Mylène Josserand <mylene.josserand@collabora.com>
---
 .../devicetree/bindings/clock/rockchip,rk3288-cru.txt     | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt
index 8cb47c39ba53..bf3a9ec19241 100644
--- a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt
@@ -4,9 +4,15 @@ The RK3288 clock controller generates and supplies clock to various
 controllers within the SoC and also implements a reset controller for SoC
 peripherals.
 
+A revision of this SoC is available: rk3288w. The clock tree is a bit
+different so another dt-compatible is available. Noticed that it is only
+setting the difference but there is no automatic revision detection. This
+should be performed by bootloaders.
+
 Required Properties:
 
-- compatible: should be "rockchip,rk3288-cru"
+- compatible: should be "rockchip,rk3288-cru" or "rockchip,rk3288w-cru" in
+  case of this revision of Rockchip rk3288.
 - reg: physical base address of the controller and length of memory mapped
   region.
 - #clock-cells: should be 1.
-- 
2.26.2


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  parent reply	other threads:[~2020-06-02  8:07 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-02  8:06 [PATCH v4 0/2] ARM: Add Rockchip rk3288w support Mylène Josserand
2020-06-02  8:06 ` Mylène Josserand
2020-06-02  8:06 ` Mylène Josserand
2020-06-02  8:06 ` [PATCH v4 1/2] clk: rockchip: rk3288: Handle clock tree for rk3288w Mylène Josserand
2020-06-02  8:06   ` Mylène Josserand
2020-06-29 19:11   ` Jagan Teki
2020-06-29 19:11     ` Jagan Teki
2020-07-03 14:11     ` Heiko Stuebner
2020-07-03 14:11       ` Heiko Stuebner
2020-07-03 14:23       ` Jagan Teki
2020-07-03 14:23         ` Jagan Teki
2020-07-03 14:48         ` Heiko Stuebner
2020-07-03 14:48           ` Heiko Stuebner
2020-07-03 15:43           ` Robin Murphy
2020-07-03 15:43             ` Robin Murphy
2020-07-03 15:02       ` Ezequiel Garcia
2020-07-03 15:02         ` Ezequiel Garcia
2020-07-03 15:05         ` Heiko Stuebner
2020-07-03 15:05           ` Heiko Stuebner
2020-06-02  8:06 ` Mylène Josserand [this message]
2020-06-02  8:06   ` [PATCH v4 2/2] dt-bindings: clocks: rk3288: add rk3288w compatible Mylène Josserand
2020-06-09 22:47   ` Rob Herring
2020-06-09 22:47     ` Rob Herring
2020-06-17  8:58 ` [PATCH v4 0/2] ARM: Add Rockchip rk3288w support Heiko Stuebner
2020-06-17  8:58   ` Heiko Stuebner
2020-06-17  8:58   ` Heiko Stuebner
2020-06-29  7:59   ` Mylene Josserand
2020-06-29  7:59     ` Mylene Josserand

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