From: Oder Chiou <oder_chiou@realtek.com>
To: <broonie@kernel.org>, <lgirdwood@gmail.com>
Cc: Oder Chiou <oder_chiou@realtek.com>,
jack.yu@realtek.com, alsa-devel@alsa-project.org,
cychiang@google.com, albertchen@realtek.com,
derek.fang@realtek.com, shumingf@realtek.com, flove@realtek.com
Subject: [PATCH] ASoC: rl6231: Modify the target DMIC clock rate
Date: Thu, 4 Jun 2020 15:10:16 +0800 [thread overview]
Message-ID: <20200604071016.3981-1-oder_chiou@realtek.com> (raw)
Some DMIC components will not work correctly in the clock rate 3.072MHz.
We recommend the clock rate 1.536MHz in the gerenal case.
Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
---
sound/soc/codecs/rl6231.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/rl6231.c b/sound/soc/codecs/rl6231.c
index 2586d1cafc0c..8c9daf32bab8 100644
--- a/sound/soc/codecs/rl6231.c
+++ b/sound/soc/codecs/rl6231.c
@@ -80,8 +80,8 @@ int rl6231_calc_dmic_clk(int rate)
for (i = 0; i < ARRAY_SIZE(div); i++) {
if ((div[i] % 3) == 0)
continue;
- /* find divider that gives DMIC frequency below 3.072MHz */
- if (3072000 * div[i] >= rate)
+ /* find divider that gives DMIC frequency below 1.536MHz */
+ if (1536000 * div[i] >= rate)
return i;
}
--
2.25.1
next reply other threads:[~2020-06-04 7:11 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-04 7:10 Oder Chiou [this message]
2020-06-04 14:05 ` [PATCH] ASoC: rl6231: Modify the target DMIC clock rate Mark Brown
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