From: Lars Povlsen <lars.povlsen@microchip.com> To: SoC Team <soc@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Stephen Boyd <sboyd@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: Lars Povlsen <lars.povlsen@microchip.com>, Steen Hegelund <Steen.Hegelund@microchip.com>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, Olof Johansson <olof@lixom.net>, "Michael Turquette" <mturquette@baylibre.com>, <devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Alexandre Belloni <alexandre.belloni@bootlin.com> Subject: [PATCH v3 06/10] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock Date: Mon, 15 Jun 2020 15:32:38 +0200 [thread overview] Message-ID: <20200615133242.24911-7-lars.povlsen@microchip.com> (raw) In-Reply-To: <20200615133242.24911-1-lars.povlsen@microchip.com> This add the DT bindings documentation for the Sparx5 SoC DPLL clock Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> --- .../bindings/clock/microchip,sparx5-dpll.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml diff --git a/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml new file mode 100644 index 0000000000000..39559a0a598ad --- /dev/null +++ b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/microchip,sparx5-dpll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 DPLL Clock + +maintainers: + - Lars Povlsen <lars.povlsen@microchip.com> + +description: | + The Sparx5 DPLL clock controller generates and supplies clock to + various peripherals within the SoC. + +properties: + compatible: + const: microchip,sparx5-dpll + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + # Clock provider for eMMC: + - | + lcpll_clk: lcpll-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <2500000000>; + }; + clks: clock-controller@61110000c { + compatible = "microchip,sparx5-dpll"; + #clock-cells = <1>; + clocks = <&lcpll_clk>; + reg = <0x1110000c 0x24>; + }; + +... -- 2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Lars Povlsen <lars.povlsen@microchip.com> To: SoC Team <soc@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Stephen Boyd <sboyd@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org, Alexandre Belloni <alexandre.belloni@bootlin.com>, Steen Hegelund <Steen.Hegelund@microchip.com>, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Olof Johansson <olof@lixom.net>, Michael Turquette <mturquette@baylibre.com>, Lars Povlsen <lars.povlsen@microchip.com> Subject: [PATCH v3 06/10] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock Date: Mon, 15 Jun 2020 15:32:38 +0200 [thread overview] Message-ID: <20200615133242.24911-7-lars.povlsen@microchip.com> (raw) In-Reply-To: <20200615133242.24911-1-lars.povlsen@microchip.com> This add the DT bindings documentation for the Sparx5 SoC DPLL clock Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> --- .../bindings/clock/microchip,sparx5-dpll.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml diff --git a/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml new file mode 100644 index 0000000000000..39559a0a598ad --- /dev/null +++ b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/microchip,sparx5-dpll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 DPLL Clock + +maintainers: + - Lars Povlsen <lars.povlsen@microchip.com> + +description: | + The Sparx5 DPLL clock controller generates and supplies clock to + various peripherals within the SoC. + +properties: + compatible: + const: microchip,sparx5-dpll + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + # Clock provider for eMMC: + - | + lcpll_clk: lcpll-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <2500000000>; + }; + clks: clock-controller@61110000c { + compatible = "microchip,sparx5-dpll"; + #clock-cells = <1>; + clocks = <&lcpll_clk>; + reg = <0x1110000c 0x24>; + }; + +... -- 2.27.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-06-15 13:33 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-06-15 13:32 [PATCH v3 00/10] Adding support for Microchip Sparx5 SoC Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-06-15 13:32 ` [PATCH v3 01/10] dt-bindings: arm: sparx5: Add documentation " Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-07-13 18:40 ` Rob Herring 2020-07-13 18:40 ` Rob Herring 2020-06-15 13:32 ` [PATCH v3 02/10] arm64: sparx5: Add support for Microchip 2xA53 SoC Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-06-15 13:32 ` [PATCH v3 03/10] arm64: dts: sparx5: Add basic cpu support Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-06-15 13:32 ` [PATCH v3 04/10] arm64: dts: sparx5: Add pinctrl support Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-06-15 13:32 ` [PATCH v3 05/10] pinctrl: ocelot: Add Sparx5 SoC support Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-06-20 21:10 ` Linus Walleij 2020-06-20 21:10 ` Linus Walleij 2020-06-22 7:54 ` Lars Povlsen 2020-07-07 11:58 ` Linus Walleij 2020-07-07 11:58 ` Linus Walleij 2020-06-15 13:32 ` Lars Povlsen [this message] 2020-06-15 13:32 ` [PATCH v3 06/10] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen 2020-07-13 18:41 ` Rob Herring 2020-07-13 18:41 ` Rob Herring 2020-06-15 13:32 ` [PATCH v3 07/10] dt-bindings: clock: sparx5: Add bindings include file Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-07-13 18:41 ` Rob Herring 2020-07-13 18:41 ` Rob Herring 2020-06-15 13:32 ` [PATCH v3 08/10] clk: sparx5: Add Sparx5 SoC DPLL clock driver Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-07-24 8:41 ` Stephen Boyd 2020-07-24 12:19 ` Lars Povlsen 2020-07-24 12:19 ` Lars Povlsen 2020-06-15 13:32 ` [PATCH v3 09/10] arm64: dts: sparx5: Add Sparx5 SoC DPLL clock Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-06-15 13:32 ` [PATCH v3 10/10] arm64: dts: sparx5: Add i2c devices, i2c muxes Lars Povlsen 2020-06-15 13:32 ` Lars Povlsen 2020-07-22 20:32 ` [PATCH v3 00/10] Adding support for Microchip Sparx5 SoC Arnd Bergmann 2020-07-22 20:32 ` Arnd Bergmann 2020-07-23 10:09 ` Lars Povlsen 2020-07-23 10:09 ` Lars Povlsen
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