From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-amlogic@lists.infradead.org, khilman@baylibre.com
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: [PATCH 2/3] ARM: dts: meson8b: ec100: enable the SDHC controller
Date: Sat, 20 Jun 2020 18:36:53 +0200 [thread overview]
Message-ID: <20200620163654.37207-3-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20200620163654.37207-1-martin.blumenstingl@googlemail.com>
EC-100 has built-in eMMC flash which is hard-wired to 3.3V VCC (which
means it's limited to high-speed MMC modes). Enable the SDHC controller
to access the contents of the eMMC flash.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm/boot/dts/meson8b-ec100.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts
index 163a200d5a7b..ed06102a4014 100644
--- a/arch/arm/boot/dts/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/meson8b-ec100.dts
@@ -27,6 +27,11 @@ memory {
reg = <0x40000000 0x40000000>;
};
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
gpio-keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
@@ -299,6 +304,26 @@ &saradc {
vref-supply = <&vcc_1v8>;
};
+&sdhc {
+ status = "okay";
+
+ pinctrl-0 = <&sdxc_c_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <8>;
+ max-frequency = <50000000>;
+
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ no-sdio;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_3v3>;
+};
+
&sdio {
status = "okay";
--
2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-amlogic@lists.infradead.org, khilman@baylibre.com
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] ARM: dts: meson8b: ec100: enable the SDHC controller
Date: Sat, 20 Jun 2020 18:36:53 +0200 [thread overview]
Message-ID: <20200620163654.37207-3-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20200620163654.37207-1-martin.blumenstingl@googlemail.com>
EC-100 has built-in eMMC flash which is hard-wired to 3.3V VCC (which
means it's limited to high-speed MMC modes). Enable the SDHC controller
to access the contents of the eMMC flash.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm/boot/dts/meson8b-ec100.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts
index 163a200d5a7b..ed06102a4014 100644
--- a/arch/arm/boot/dts/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/meson8b-ec100.dts
@@ -27,6 +27,11 @@ memory {
reg = <0x40000000 0x40000000>;
};
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
gpio-keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
@@ -299,6 +304,26 @@ &saradc {
vref-supply = <&vcc_1v8>;
};
+&sdhc {
+ status = "okay";
+
+ pinctrl-0 = <&sdxc_c_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <8>;
+ max-frequency = <50000000>;
+
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ no-sdio;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_3v3>;
+};
+
&sdio {
status = "okay";
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-amlogic@lists.infradead.org, khilman@baylibre.com
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] ARM: dts: meson8b: ec100: enable the SDHC controller
Date: Sat, 20 Jun 2020 18:36:53 +0200 [thread overview]
Message-ID: <20200620163654.37207-3-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20200620163654.37207-1-martin.blumenstingl@googlemail.com>
EC-100 has built-in eMMC flash which is hard-wired to 3.3V VCC (which
means it's limited to high-speed MMC modes). Enable the SDHC controller
to access the contents of the eMMC flash.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm/boot/dts/meson8b-ec100.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts
index 163a200d5a7b..ed06102a4014 100644
--- a/arch/arm/boot/dts/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/meson8b-ec100.dts
@@ -27,6 +27,11 @@ memory {
reg = <0x40000000 0x40000000>;
};
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
gpio-keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
@@ -299,6 +304,26 @@ &saradc {
vref-supply = <&vcc_1v8>;
};
+&sdhc {
+ status = "okay";
+
+ pinctrl-0 = <&sdxc_c_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <8>;
+ max-frequency = <50000000>;
+
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ no-sdio;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_3v3>;
+};
+
&sdio {
status = "okay";
--
2.27.0
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
next prev parent reply other threads:[~2020-06-20 16:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-20 16:36 [PATCH 0/3] ARM: dts: use the SDHC MMC controller for eMMC Martin Blumenstingl
2020-06-20 16:36 ` Martin Blumenstingl
2020-06-20 16:36 ` Martin Blumenstingl
2020-06-20 16:36 ` [PATCH 1/3] ARM: dts: meson: add the SDHC MMC controller Martin Blumenstingl
2020-06-20 16:36 ` Martin Blumenstingl
2020-06-20 16:36 ` Martin Blumenstingl
2020-06-22 12:47 ` Anand Moon
2020-06-20 16:36 ` Martin Blumenstingl [this message]
2020-06-20 16:36 ` [PATCH 2/3] ARM: dts: meson8b: ec100: enable the SDHC controller Martin Blumenstingl
2020-06-20 16:36 ` Martin Blumenstingl
2020-06-20 16:36 ` [PATCH 3/3] ARM: dts: meson8b: odroidc1: " Martin Blumenstingl
2020-06-20 16:36 ` Martin Blumenstingl
2020-06-20 16:36 ` Martin Blumenstingl
2020-06-22 12:47 ` Anand Moon
2020-07-13 19:03 ` [PATCH 0/3] ARM: dts: use the SDHC MMC controller for eMMC Kevin Hilman
2020-07-13 19:03 ` Kevin Hilman
2020-07-13 19:03 ` Kevin Hilman
2020-07-13 19:21 ` patchwork-bot+linux-amlogic
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