All of lore.kernel.org
 help / color / mirror / Atom feed
From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [Intel-gfx] [v4 07/10] drm/i915/display: Implement DRM infoframe read for LSPCON
Date: Mon, 22 Jun 2020 18:30:26 +0530	[thread overview]
Message-ID: <20200622130029.28667-8-uma.shankar@intel.com> (raw)
In-Reply-To: <20200622130029.28667-1-uma.shankar@intel.com>

Implement Read back of HDR metadata infoframes i.e Dynamic Range
and Mastering Infoframe for LSPCON devices.

v2: Added proper bitmask of enabled infoframes as per Ville's
recommendation.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c   | 10 ++++++++++
 drivers/gpu/drm/i915/display/intel_lspcon.c |  6 +++++-
 drivers/gpu/drm/i915/display/intel_lspcon.h |  4 ++++
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 53103ef72a58..786378442dd2 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -600,6 +600,16 @@ void lspcon_drm_write_infoframe(struct intel_encoder *encoder,
 	hsw_write_infoframe(encoder, crtc_state, type, frame, len);
 }
 
+void lspcon_drm_read_infoframe(struct intel_encoder *encoder,
+			       const struct intel_crtc_state *crtc_state,
+			       unsigned int type,
+			       void *frame, ssize_t len)
+{
+	drm_dbg_kms(encoder->base.dev, "Read HDR metadata for lspcon\n");
+	/* It uses the legacy hsw implementation for the same */
+	hsw_read_infoframe(encoder, crtc_state, type, frame, len);
+}
+
 static const u8 infoframe_type_to_idx[] = {
 	HDMI_PACKET_TYPE_GENERAL_CONTROL,
 	HDMI_PACKET_TYPE_GAMUT_METADATA,
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 0f19eb6c5a6d..58ebcd198d9e 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -501,7 +501,11 @@ void lspcon_read_infoframe(struct intel_encoder *encoder,
 			   unsigned int type,
 			   void *frame, ssize_t len)
 {
-	/* FIXME implement this */
+	/* FIXME implement for AVI Infoframe as well */
+	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA)
+		lspcon_drm_read_infoframe(encoder, crtc_state,
+					  HDMI_PACKET_TYPE_GAMUT_METADATA,
+					  frame, VIDEO_DIP_DATA_SIZE);
 }
 
 /* HDMI HDR Colorspace Spec Definitions */
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index b2051f236223..68d2d835bd86 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -38,4 +38,8 @@ void lspcon_drm_write_infoframe(struct intel_encoder *encoder,
 				const struct intel_crtc_state *crtc_state,
 				unsigned int type,
 				const void *frame, ssize_t len);
+void lspcon_drm_read_infoframe(struct intel_encoder *encoder,
+			       const struct intel_crtc_state *crtc_state,
+			       unsigned int type,
+			       void *frame, ssize_t len);
 #endif /* __INTEL_LSPCON_H__ */
-- 
2.22.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-06-22 12:30 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-22 13:00 [Intel-gfx] [v4 00/10] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-06-22 13:00 ` [Intel-gfx] [v4 01/10] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-06-22 13:00 ` [Intel-gfx] [v4 02/10] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-06-22 13:00 ` [Intel-gfx] [v4 03/10] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-06-22 13:00 ` [Intel-gfx] [v4 04/10] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-06-22 13:00 ` [Intel-gfx] [v4 05/10] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-06-22 13:00 ` [Intel-gfx] [v4 06/10] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-06-22 13:00 ` Uma Shankar [this message]
2020-06-22 13:00 ` [Intel-gfx] [v4 08/10] drm/i915/lspcon: Do not send infoframes to non-HDMI sinks Uma Shankar
2020-06-22 13:00 ` [Intel-gfx] [v4 09/10] drm/i915/lspcon: Do not send DRM " Uma Shankar
2020-06-22 13:00 ` [Intel-gfx] [v4 10/10] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-06-22 13:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev4) Patchwork
2020-06-22 13:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-22 16:00 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200622130029.28667-8-uma.shankar@intel.com \
    --to=uma.shankar@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.