From: Alim Akhtar <alim.akhtar@samsung.com> To: vkoul@kernel.org Cc: robh+dt@kernel.org, krzk@kernel.org, kwmad.kim@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, kishon@ti.com, Alim Akhtar <alim.akhtar@samsung.com> Subject: [PATCH v11 1/2] dt-bindings: phy: Document Samsung UFS PHY bindings Date: Fri, 3 Jul 2020 07:51:02 +0530 [thread overview] Message-ID: <20200703022103.41849-1-alim.akhtar@samsung.com> (raw) In-Reply-To: CGME20200703024110epcas5p1ef8cfff90d1fcb9604613a44ee466d0b@epcas5p1.samsung.com This patch documents Samsung UFS PHY device tree bindings Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> --- .../bindings/phy/samsung,ufs-phy.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml new file mode 100644 index 000000000000..636cc501b54f --- /dev/null +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC series UFS PHY Device Tree Bindings + +maintainers: + - Alim Akhtar <alim.akhtar@samsung.com> + +properties: + "#phy-cells": + const: 0 + + compatible: + enum: + - samsung,exynos7-ufs-phy + + reg: + maxItems: 1 + + reg-names: + items: + - const: phy-pma + + clocks: + items: + - description: PLL reference clock + - description: symbol clock for input symbol ( rx0-ch0 symbol clock) + - description: symbol clock for input symbol ( rx1-ch1 symbol clock) + - description: symbol clock for output symbol ( tx0 symbol clock) + + clock-names: + items: + - const: ref_clk + - const: rx1_symbol_clk + - const: rx0_symbol_clk + - const: tx0_symbol_clk + + samsung,pmu-syscon: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: phandle for PMU system controller interface, used to + control pmu registers bits for ufs m-phy + +required: + - "#phy-cells" + - compatible + - reg + - reg-names + - clocks + - clock-names + - samsung,pmu-syscon + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/exynos7-clk.h> + + ufs_phy: ufs-phy@15571800 { + compatible = "samsung,exynos7-ufs-phy"; + reg = <0x15571800 0x240>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&clock_fsys1 SCLK_COMBO_PHY_EMBEDDED_26M>, + <&clock_fsys1 PHYCLK_UFS20_RX1_SYMBOL_USER>, + <&clock_fsys1 PHYCLK_UFS20_RX0_SYMBOL_USER>, + <&clock_fsys1 PHYCLK_UFS20_TX0_SYMBOL_USER>; + clock-names = "ref_clk", "rx1_symbol_clk", + "rx0_symbol_clk", "tx0_symbol_clk"; + + }; +... base-commit: aab2003999e78bbf2058dae1e661c44ede1d9766 -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Alim Akhtar <alim.akhtar@samsung.com> To: vkoul@kernel.org Cc: devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, krzk@kernel.org, kwmad.kim@samsung.com, robh+dt@kernel.org, Alim Akhtar <alim.akhtar@samsung.com>, kishon@ti.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH v11 1/2] dt-bindings: phy: Document Samsung UFS PHY bindings Date: Fri, 3 Jul 2020 07:51:02 +0530 [thread overview] Message-ID: <20200703022103.41849-1-alim.akhtar@samsung.com> (raw) In-Reply-To: CGME20200703024110epcas5p1ef8cfff90d1fcb9604613a44ee466d0b@epcas5p1.samsung.com This patch documents Samsung UFS PHY device tree bindings Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> --- .../bindings/phy/samsung,ufs-phy.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml new file mode 100644 index 000000000000..636cc501b54f --- /dev/null +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC series UFS PHY Device Tree Bindings + +maintainers: + - Alim Akhtar <alim.akhtar@samsung.com> + +properties: + "#phy-cells": + const: 0 + + compatible: + enum: + - samsung,exynos7-ufs-phy + + reg: + maxItems: 1 + + reg-names: + items: + - const: phy-pma + + clocks: + items: + - description: PLL reference clock + - description: symbol clock for input symbol ( rx0-ch0 symbol clock) + - description: symbol clock for input symbol ( rx1-ch1 symbol clock) + - description: symbol clock for output symbol ( tx0 symbol clock) + + clock-names: + items: + - const: ref_clk + - const: rx1_symbol_clk + - const: rx0_symbol_clk + - const: tx0_symbol_clk + + samsung,pmu-syscon: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: phandle for PMU system controller interface, used to + control pmu registers bits for ufs m-phy + +required: + - "#phy-cells" + - compatible + - reg + - reg-names + - clocks + - clock-names + - samsung,pmu-syscon + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/exynos7-clk.h> + + ufs_phy: ufs-phy@15571800 { + compatible = "samsung,exynos7-ufs-phy"; + reg = <0x15571800 0x240>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&clock_fsys1 SCLK_COMBO_PHY_EMBEDDED_26M>, + <&clock_fsys1 PHYCLK_UFS20_RX1_SYMBOL_USER>, + <&clock_fsys1 PHYCLK_UFS20_RX0_SYMBOL_USER>, + <&clock_fsys1 PHYCLK_UFS20_TX0_SYMBOL_USER>; + clock-names = "ref_clk", "rx1_symbol_clk", + "rx0_symbol_clk", "tx0_symbol_clk"; + + }; +... base-commit: aab2003999e78bbf2058dae1e661c44ede1d9766 -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next parent reply other threads:[~2020-07-03 2:41 UTC|newest] Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <CGME20200703024110epcas5p1ef8cfff90d1fcb9604613a44ee466d0b@epcas5p1.samsung.com> 2020-07-03 2:21 ` Alim Akhtar [this message] 2020-07-03 2:21 ` [PATCH v11 1/2] dt-bindings: phy: Document Samsung UFS PHY bindings Alim Akhtar [not found] ` <CGME20200703024112epcas5p326e2e16f659242b1beb2db581043a0c8@epcas5p3.samsung.com> 2020-07-03 2:21 ` [PATCH v11 2/2] phy: samsung-ufs: add UFS PHY driver for samsung SoC Alim Akhtar 2020-07-03 2:21 ` Alim Akhtar 2020-07-03 5:43 ` kernel test robot 2020-07-03 5:43 ` kernel test robot
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