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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs
Date: Thu, 16 Jul 2020 20:20:59 +0300	[thread overview]
Message-ID: <20200716172106.2656-8-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200716172106.2656-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sort the HSW PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 026db4d496e9..4870c3c9f9b2 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -170,9 +170,9 @@
 
 #define INTEL_HSW_ULT_GT1_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
+	INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
 	INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
-	INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0A06, info)  /* ULT GT1 mobile */
+	INTEL_VGA_DEVICE(0x0A0B, info)  /* ULT GT1 reserved */
 
 #define INTEL_HSW_ULX_GT1_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */
@@ -181,26 +181,26 @@
 	INTEL_HSW_ULT_GT1_IDS(info), \
 	INTEL_HSW_ULX_GT1_IDS(info), \
 	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
+	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
 	INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \
 	INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
+	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
 	INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
 	INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
+	INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */	\
 	INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
 	INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
-	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
-	INTEL_VGA_DEVICE(0x0D06, info)  /* CRW GT1 mobile */
+	INTEL_VGA_DEVICE(0x0D0E, info)  /* CRW GT1 reserved */
 
 #define INTEL_HSW_ULT_GT2_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
+	INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */	\
 	INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
-	INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0A16, info)  /* ULT GT2 mobile */
+	INTEL_VGA_DEVICE(0x0A1B, info)  /* ULT GT2 reserved */ \
 
 #define INTEL_HSW_ULX_GT2_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \
@@ -209,45 +209,45 @@
 	INTEL_HSW_ULT_GT2_IDS(info), \
 	INTEL_HSW_ULX_GT2_IDS(info), \
 	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
+	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \
 	INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
+	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
 	INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
+	INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
 	INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
-	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
-	INTEL_VGA_DEVICE(0x0D16, info)  /* CRW GT2 mobile */
+	INTEL_VGA_DEVICE(0x0D1E, info)  /* CRW GT2 reserved */
 
 #define INTEL_HSW_ULT_GT3_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
+	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
 	INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0A2E, info)  /* ULT GT3 reserved */
 
 #define INTEL_HSW_GT3_IDS(info) \
 	INTEL_HSW_ULT_GT3_IDS(info), \
 	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
+	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \
 	INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
+	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
 	INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
+	INTEL_VGA_DEVICE(0x0D26, info), /* CRW GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
 	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
-	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
-	INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
+	INTEL_VGA_DEVICE(0x0D2E, info)  /* CRW GT3 reserved */
 
 #define INTEL_HSW_IDS(info) \
 	INTEL_HSW_GT1_IDS(info), \
-- 
2.26.2

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  parent reply	other threads:[~2020-07-16 17:21 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
2020-07-16 17:20 ` [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs Ville Syrjala
2020-09-23 23:46   ` Srivatsa, Anusha
2020-07-16 17:20 ` [Intel-gfx] [PATCH 02/14] drm/i915: Reclassify SKL 0x192a as GT3 Ville Syrjala
2020-07-16 17:20 ` [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT Ville Syrjala
2020-09-24  0:32   ` Srivatsa, Anusha
2020-07-16 17:20 ` [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs Ville Syrjala
2020-09-24  0:37   ` Srivatsa, Anusha
2020-09-24 10:46     ` Ville Syrjälä
2020-09-24 17:54       ` Srivatsa, Anusha
2020-07-16 17:20 ` [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments Ville Syrjala
2020-09-24  0:40   ` Srivatsa, Anusha
2020-07-16 17:20 ` [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex numbers Ville Syrjala
2020-09-24  0:42   ` Srivatsa, Anusha
2020-07-16 17:20 ` Ville Syrjala [this message]
2020-09-24  0:44   ` [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL " Ville Syrjala
2020-09-24  0:49   ` Srivatsa, Anusha
2020-09-24 10:50     ` Ville Syrjälä
2020-07-16 17:21 ` [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL " Ville Syrjala
2020-09-24  0:50   ` Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML " Ville Syrjala
2020-09-24  0:53   ` Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL " Ville Syrjala
2020-09-24  0:55   ` Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL " Ville Syrjala
2020-09-24  0:59   ` Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL " Ville Syrjala
2020-09-24  1:01   ` Srivatsa, Anusha
2020-10-23 23:55   ` Lucas De Marchi
2020-07-16 17:21 ` [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL " Ville Syrjala
2020-09-24  1:04   ` Srivatsa, Anusha
2020-07-16 18:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: PCI ID cleanup Patchwork
2020-07-16 18:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-16 19:51 ` [Intel-gfx] [PATCH 00/14] " Alexei Podtelezhnikov
2020-07-16 23:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork

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