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From: Joerg Roedel <joro@8bytes.org>
To: x86@kernel.org
Cc: Joerg Roedel <joro@8bytes.org>, Joerg Roedel <jroedel@suse.de>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	hpa@zytor.com, Andy Lutomirski <luto@kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Jiri Slaby <jslaby@suse.cz>,
	Dan Williams <dan.j.williams@intel.com>,
	Juergen Gross <jgross@suse.com>,
	Kees Cook <keescook@chromium.org>,
	David Rientjes <rientjes@google.com>,
	Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Mike Stunes <mstunes@vmware.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Martin Radev <martin.b.radev@gmail.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	virtualization@lists.linux-foundation.org
Subject: [PATCH v5 24/75] x86/sev-es: Add support for handling IOIO exceptions
Date: Fri, 24 Jul 2020 18:02:45 +0200	[thread overview]
Message-ID: <20200724160336.5435-25-joro@8bytes.org> (raw)
In-Reply-To: <20200724160336.5435-1-joro@8bytes.org>

From: Tom Lendacky <thomas.lendacky@amd.com>

Add support for decoding and handling #VC exceptions for IOIO events.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
[ jroedel@suse.de: Adapted code to #VC handling framework ]
Co-developed-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
---
 arch/x86/boot/compressed/sev-es.c |  32 +++++
 arch/x86/kernel/sev-es-shared.c   | 214 ++++++++++++++++++++++++++++++
 2 files changed, 246 insertions(+)

diff --git a/arch/x86/boot/compressed/sev-es.c b/arch/x86/boot/compressed/sev-es.c
index e3abf8737015..4f2fc7a85c2f 100644
--- a/arch/x86/boot/compressed/sev-es.c
+++ b/arch/x86/boot/compressed/sev-es.c
@@ -24,6 +24,35 @@
 struct ghcb boot_ghcb_page __aligned(PAGE_SIZE);
 struct ghcb *boot_ghcb;
 
+/*
+ * Copy a version of this function here - insn-eval.c can't be used in
+ * pre-decompression code.
+ */
+static bool insn_has_rep_prefix(struct insn *insn)
+{
+	int i;
+
+	insn_get_prefixes(insn);
+
+	for (i = 0; i < insn->prefixes.nbytes; i++) {
+		insn_byte_t p = insn->prefixes.bytes[i];
+
+		if (p == 0xf2 || p == 0xf3)
+			return true;
+	}
+
+	return false;
+}
+
+/*
+ * Only a dummy for insn_get_seg_base() - Early boot-code is 64bit only and
+ * doesn't use segments.
+ */
+static unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)
+{
+	return 0UL;
+}
+
 static inline u64 sev_es_rd_ghcb_msr(void)
 {
 	unsigned long low, high;
@@ -151,6 +180,9 @@ void do_boot_stage2_vc(struct pt_regs *regs, unsigned long exit_code)
 		goto finish;
 
 	switch (exit_code) {
+	case SVM_EXIT_IOIO:
+		result = vc_handle_ioio(boot_ghcb, &ctxt);
+		break;
 	default:
 		result = ES_UNSUPPORTED;
 		break;
diff --git a/arch/x86/kernel/sev-es-shared.c b/arch/x86/kernel/sev-es-shared.c
index 7ac6e6b0ae57..66d60e34eba0 100644
--- a/arch/x86/kernel/sev-es-shared.c
+++ b/arch/x86/kernel/sev-es-shared.c
@@ -218,3 +218,217 @@ static enum es_result vc_insn_string_write(struct es_em_ctxt *ctxt,
 
 	return ret;
 }
+
+#define IOIO_TYPE_STR  BIT(2)
+#define IOIO_TYPE_IN   1
+#define IOIO_TYPE_INS  (IOIO_TYPE_IN | IOIO_TYPE_STR)
+#define IOIO_TYPE_OUT  0
+#define IOIO_TYPE_OUTS (IOIO_TYPE_OUT | IOIO_TYPE_STR)
+
+#define IOIO_REP       BIT(3)
+
+#define IOIO_ADDR_64   BIT(9)
+#define IOIO_ADDR_32   BIT(8)
+#define IOIO_ADDR_16   BIT(7)
+
+#define IOIO_DATA_32   BIT(6)
+#define IOIO_DATA_16   BIT(5)
+#define IOIO_DATA_8    BIT(4)
+
+#define IOIO_SEG_ES    (0 << 10)
+#define IOIO_SEG_DS    (3 << 10)
+
+static enum es_result vc_ioio_exitinfo(struct es_em_ctxt *ctxt, u64 *exitinfo)
+{
+	struct insn *insn = &ctxt->insn;
+	*exitinfo = 0;
+
+	switch (insn->opcode.bytes[0]) {
+	/* INS opcodes */
+	case 0x6c:
+	case 0x6d:
+		*exitinfo |= IOIO_TYPE_INS;
+		*exitinfo |= IOIO_SEG_ES;
+		*exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
+		break;
+
+	/* OUTS opcodes */
+	case 0x6e:
+	case 0x6f:
+		*exitinfo |= IOIO_TYPE_OUTS;
+		*exitinfo |= IOIO_SEG_DS;
+		*exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
+		break;
+
+	/* IN immediate opcodes */
+	case 0xe4:
+	case 0xe5:
+		*exitinfo |= IOIO_TYPE_IN;
+		*exitinfo |= insn->immediate.value << 16;
+		break;
+
+	/* OUT immediate opcodes */
+	case 0xe6:
+	case 0xe7:
+		*exitinfo |= IOIO_TYPE_OUT;
+		*exitinfo |= insn->immediate.value << 16;
+		break;
+
+	/* IN register opcodes */
+	case 0xec:
+	case 0xed:
+		*exitinfo |= IOIO_TYPE_IN;
+		*exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
+		break;
+
+	/* OUT register opcodes */
+	case 0xee:
+	case 0xef:
+		*exitinfo |= IOIO_TYPE_OUT;
+		*exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
+		break;
+
+	default:
+		return ES_DECODE_FAILED;
+	}
+
+	switch (insn->opcode.bytes[0]) {
+	case 0x6c:
+	case 0x6e:
+	case 0xe4:
+	case 0xe6:
+	case 0xec:
+	case 0xee:
+		/* Single byte opcodes */
+		*exitinfo |= IOIO_DATA_8;
+		break;
+	default:
+		/* Length determined by instruction parsing */
+		*exitinfo |= (insn->opnd_bytes == 2) ? IOIO_DATA_16
+						     : IOIO_DATA_32;
+	}
+	switch (insn->addr_bytes) {
+	case 2:
+		*exitinfo |= IOIO_ADDR_16;
+		break;
+	case 4:
+		*exitinfo |= IOIO_ADDR_32;
+		break;
+	case 8:
+		*exitinfo |= IOIO_ADDR_64;
+		break;
+	}
+
+	if (insn_has_rep_prefix(insn))
+		*exitinfo |= IOIO_REP;
+
+	return ES_OK;
+}
+
+static enum es_result vc_handle_ioio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
+{
+	struct pt_regs *regs = ctxt->regs;
+	u64 exit_info_1, exit_info_2;
+	enum es_result ret;
+
+	ret = vc_ioio_exitinfo(ctxt, &exit_info_1);
+	if (ret != ES_OK)
+		return ret;
+
+	if (exit_info_1 & IOIO_TYPE_STR) {
+
+		/* (REP) INS/OUTS */
+
+		bool df = ((regs->flags & X86_EFLAGS_DF) == X86_EFLAGS_DF);
+		unsigned int io_bytes, exit_bytes;
+		unsigned int ghcb_count, op_count;
+		unsigned long es_base;
+		u64 sw_scratch;
+
+		/*
+		 * For the string variants with rep prefix the amount of in/out
+		 * operations per #VC exception is limited so that the kernel
+		 * has a chance to take interrupts and re-schedule while the
+		 * instruction is emulated.
+		 */
+		io_bytes   = (exit_info_1 >> 4) & 0x7;
+		ghcb_count = sizeof(ghcb->shared_buffer) / io_bytes;
+
+		op_count    = (exit_info_1 & IOIO_REP) ? regs->cx : 1;
+		exit_info_2 = min(op_count, ghcb_count);
+		exit_bytes  = exit_info_2 * io_bytes;
+
+		es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES);
+
+		/* Read bytes of OUTS into the shared buffer */
+		if (!(exit_info_1 & IOIO_TYPE_IN)) {
+			ret = vc_insn_string_read(ctxt,
+					       (void *)(es_base + regs->si),
+					       ghcb->shared_buffer, io_bytes,
+					       exit_info_2, df);
+			if (ret)
+				return ret;
+		}
+
+		/*
+		 * Issue an VMGEXIT to the HV to consume the bytes from the
+		 * shared buffer or to have it write them into the shared buffer
+		 * depending on the instruction: OUTS or INS.
+		 */
+		sw_scratch = __pa(ghcb) + offsetof(struct ghcb, shared_buffer);
+		ghcb_set_sw_scratch(ghcb, sw_scratch);
+		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO,
+					  exit_info_1, exit_info_2);
+		if (ret != ES_OK)
+			return ret;
+
+		/* Read bytes from shared buffer into the guest's destination. */
+		if (exit_info_1 & IOIO_TYPE_IN) {
+			ret = vc_insn_string_write(ctxt,
+						   (void *)(es_base + regs->di),
+						   ghcb->shared_buffer, io_bytes,
+						   exit_info_2, df);
+			if (ret)
+				return ret;
+
+			if (df)
+				regs->di -= exit_bytes;
+			else
+				regs->di += exit_bytes;
+		} else {
+			if (df)
+				regs->si -= exit_bytes;
+			else
+				regs->si += exit_bytes;
+		}
+
+		if (exit_info_1 & IOIO_REP)
+			regs->cx -= exit_info_2;
+
+		ret = regs->cx ? ES_RETRY : ES_OK;
+
+	} else {
+
+		/* IN/OUT into/from rAX */
+
+		int bits = (exit_info_1 & 0x70) >> 1;
+		u64 rax = 0;
+
+		if (!(exit_info_1 & IOIO_TYPE_IN))
+			rax = lower_bits(regs->ax, bits);
+
+		ghcb_set_rax(ghcb, rax);
+
+		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO, exit_info_1, 0);
+		if (ret != ES_OK)
+			return ret;
+
+		if (exit_info_1 & IOIO_TYPE_IN) {
+			if (!ghcb_is_valid_rax(ghcb))
+				return ES_VMM_ERROR;
+			regs->ax = lower_bits(ghcb->save.rax, bits);
+		}
+	}
+
+	return ret;
+}
-- 
2.27.0


  parent reply	other threads:[~2020-07-24 16:10 UTC|newest]

Thread overview: 101+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-24 16:02 [PATCH v5 00/75] x86: SEV-ES Guest Support Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 01/75] KVM: SVM: Add GHCB definitions Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 02/75] KVM: SVM: Add GHCB Accessor functions Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 03/75] KVM: SVM: Use __packed shorthand Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 04/75] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 05/75] x86/traps: Move pf error codes to <asm/trap_pf.h> Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 06/75] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 07/75] x86/umip: Factor out instruction fetch Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 08/75] x86/umip: Factor out instruction decoding Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 09/75] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 10/75] x86/insn: Add insn_has_rep_prefix() helper Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 11/75] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel
2020-07-24 17:43   ` Kees Cook
2020-07-24 17:58   ` Arvind Sankar
2020-07-24 16:02 ` [PATCH v5 12/75] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 13/75] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 14/75] x86/boot/compressed/64: Add page-fault handler Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 15/75] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 16/75] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 17/75] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 18/75] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 19/75] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 20/75] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 21/75] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 22/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 23/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel
2020-07-24 16:02 ` Joerg Roedel [this message]
2020-07-24 16:02 ` [PATCH v5 25/75] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 26/75] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 27/75] x86/idt: Move IDT to data segment Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 28/75] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 29/75] x86/head/64: Install startup GDT Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 30/75] x86/head/64: Setup MSR_GS_BASE before calling into C code Joerg Roedel
2020-07-24 17:42   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 31/75] x86/head/64: Load GDT after switch to virtual addresses Joerg Roedel
2020-07-24 17:40   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 32/75] x86/head/64: Load segment registers earlier Joerg Roedel
2020-07-24 17:42   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 33/75] x86/head/64: Switch to initial stack earlier Joerg Roedel
2020-07-24 17:43   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 34/75] x86/head/64: Make fixup_pointer() static inline Joerg Roedel
2020-07-24 17:52   ` Kees Cook
2020-07-24 16:02 ` [PATCH v5 35/75] x86/head/64: Load IDT earlier Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 36/75] x86/head/64: Move early exception dispatch to C code Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 37/75] x86/head/64: Set CR4.FSGSBASE early Joerg Roedel
2020-07-24 16:02 ` [PATCH v5 38/75] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel
2020-07-24 17:54   ` Kees Cook
2020-07-24 16:03 ` [PATCH v5 39/75] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel
2020-07-24 17:54   ` Kees Cook
2020-07-24 16:03 ` [PATCH v5 40/75] x86/sev-es: Compile early handler code into kernel image Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 41/75] x86/sev-es: Setup early #VC handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 42/75] x86/sev-es: Setup GHCB based boot " Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 43/75] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 44/75] x86/sev-es: Allocate and Map IST stack for #VC handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 45/75] x86/sev-es: Adjust #VC IST Stack on entering NMI handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 46/75] x86/dumpstack/64: Add noinstr version of get_stack_info() Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 47/75] x86/entry/64: Add entry code for #VC handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 48/75] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 49/75] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 50/75] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 51/75] x86/sev-es: Handle MMIO events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 52/75] x86/sev-es: Handle MMIO String Instructions Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 53/75] x86/sev-es: Handle MSR events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 54/75] x86/sev-es: Handle DR7 read/write events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 55/75] x86/sev-es: Handle WBINVD Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 56/75] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 57/75] x86/sev-es: Handle RDPMC Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 58/75] x86/sev-es: Handle INVD Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 59/75] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 60/75] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 61/75] x86/sev-es: Handle VMMCALL Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 62/75] x86/sev-es: Handle #AC Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 63/75] x86/sev-es: Handle #DB Events Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 64/75] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 65/75] x86/kvm: Add KVM " Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 66/75] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 67/75] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 68/75] x86/realmode: Setup AP jump table Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 69/75] x86/smpboot: Setup TSS for starting AP Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 70/75] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel
2020-07-24 17:57   ` Kees Cook
2020-07-24 16:03 ` [PATCH v5 71/75] x86/head/64: Rename start_cpu0 Joerg Roedel
2020-07-24 17:56   ` Kees Cook
2020-07-24 16:03 ` [PATCH v5 72/75] x86/sev-es: Support CPU offline/online Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 73/75] x86/sev-es: Handle NMI State Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 74/75] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel
2020-07-24 16:03 ` [PATCH v5 75/75] x86/sev-es: Check required CPU features for SEV-ES Joerg Roedel
2020-07-24 17:55   ` Kees Cook
2020-07-30  1:27 ` [PATCH v5 00/75] x86: SEV-ES Guest Support Mike Stunes
2020-07-30 12:26   ` Joerg Roedel
2020-07-30 23:23     ` Mike Stunes
2020-08-18 15:07       ` Joerg Roedel
2020-08-18 15:07         ` Joerg Roedel
2020-08-20  0:58         ` Mike Stunes
2020-08-20 12:10           ` Joerg Roedel
2020-08-20 12:10             ` Joerg Roedel
2020-08-21  8:05           ` Joerg Roedel
2020-08-21  8:05             ` Joerg Roedel
2020-08-21 17:42             ` Mike Stunes
2020-08-22 16:30               ` Joerg Roedel
2020-08-22 16:30                 ` Joerg Roedel

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