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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Georgi Djakov <georgi.djakov@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Mikko Perttunen <cyndis@kapsi.fi>
Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	devicetree@vger.kernel.org
Subject: [PATCH v5 23/36] dt-bindings: memory: tegra20: Add memory client IDs
Date: Fri, 14 Aug 2020 03:06:08 +0300	[thread overview]
Message-ID: <20200814000621.8415-24-digetx@gmail.com> (raw)
In-Reply-To: <20200814000621.8415-1-digetx@gmail.com>

Each memory client have a unique hardware ID, this patch adds these IDs.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 include/dt-bindings/memory/tegra20-mc.h | 53 +++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/include/dt-bindings/memory/tegra20-mc.h b/include/dt-bindings/memory/tegra20-mc.h
index 35e131eee198..6f8829508ad0 100644
--- a/include/dt-bindings/memory/tegra20-mc.h
+++ b/include/dt-bindings/memory/tegra20-mc.h
@@ -18,4 +18,57 @@
 #define TEGRA20_MC_RESET_VDE		13
 #define TEGRA20_MC_RESET_VI		14
 
+#define TEGRA20_MC_DISPLAY0A		0
+#define TEGRA20_MC_DISPLAY0AB		1
+#define TEGRA20_MC_DISPLAY0B		2
+#define TEGRA20_MC_DISPLAY0BB		3
+#define TEGRA20_MC_DISPLAY0C		4
+#define TEGRA20_MC_DISPLAY0CB		5
+#define TEGRA20_MC_DISPLAY1B		6
+#define TEGRA20_MC_DISPLAY1BB		7
+#define TEGRA20_MC_EPPUP		8
+#define TEGRA20_MC_G2PR			9
+#define TEGRA20_MC_G2SR			10
+#define TEGRA20_MC_MPEUNIFBR		11
+#define TEGRA20_MC_VIRUV		12
+#define TEGRA20_MC_AVPCARM7R		13
+#define TEGRA20_MC_DISPLAYHC		14
+#define TEGRA20_MC_DISPLAYHCB		15
+#define TEGRA20_MC_FDCDRD		16
+#define TEGRA20_MC_G2DR			17
+#define TEGRA20_MC_HOST1XDMAR		18
+#define TEGRA20_MC_HOST1XR		19
+#define TEGRA20_MC_IDXSRD		20
+#define TEGRA20_MC_MPCORER		21
+#define TEGRA20_MC_MPE_IPRED		22
+#define TEGRA20_MC_MPEAMEMRD		23
+#define TEGRA20_MC_MPECSRD		24
+#define TEGRA20_MC_PPCSAHBDMAR		25
+#define TEGRA20_MC_PPCSAHBSLVR		26
+#define TEGRA20_MC_TEXSRD		27
+#define TEGRA20_MC_VDEBSEVR		28
+#define TEGRA20_MC_VDEMBER		29
+#define TEGRA20_MC_VDEMCER		30
+#define TEGRA20_MC_VDETPER		31
+#define TEGRA20_MC_EPPU			32
+#define TEGRA20_MC_EPPV			33
+#define TEGRA20_MC_EPPY			34
+#define TEGRA20_MC_MPEUNIFBW		35
+#define TEGRA20_MC_VIWSB		36
+#define TEGRA20_MC_VIWU			37
+#define TEGRA20_MC_VIWV			38
+#define TEGRA20_MC_VIWY			39
+#define TEGRA20_MC_G2DW			40
+#define TEGRA20_MC_AVPCARM7W		41
+#define TEGRA20_MC_FDCDWR		42
+#define TEGRA20_MC_HOST1XW		43
+#define TEGRA20_MC_ISPW			44
+#define TEGRA20_MC_MPCOREW		45
+#define TEGRA20_MC_MPECSWR		46
+#define TEGRA20_MC_PPCSAHBDMAW		47
+#define TEGRA20_MC_PPCSAHBSLVW		48
+#define TEGRA20_MC_VDEBSEVW		49
+#define TEGRA20_MC_VDEMBEW		50
+#define TEGRA20_MC_VDETPMW		51
+
 #endif
-- 
2.27.0


WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Georgi Djakov <georgi.djakov@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Mikko Perttunen <cyndis@kapsi.fi>
Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-pm@vger.kernel.org
Subject: [PATCH v5 23/36] dt-bindings: memory: tegra20: Add memory client IDs
Date: Fri, 14 Aug 2020 03:06:08 +0300	[thread overview]
Message-ID: <20200814000621.8415-24-digetx@gmail.com> (raw)
In-Reply-To: <20200814000621.8415-1-digetx@gmail.com>

Each memory client have a unique hardware ID, this patch adds these IDs.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 include/dt-bindings/memory/tegra20-mc.h | 53 +++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/include/dt-bindings/memory/tegra20-mc.h b/include/dt-bindings/memory/tegra20-mc.h
index 35e131eee198..6f8829508ad0 100644
--- a/include/dt-bindings/memory/tegra20-mc.h
+++ b/include/dt-bindings/memory/tegra20-mc.h
@@ -18,4 +18,57 @@
 #define TEGRA20_MC_RESET_VDE		13
 #define TEGRA20_MC_RESET_VI		14
 
+#define TEGRA20_MC_DISPLAY0A		0
+#define TEGRA20_MC_DISPLAY0AB		1
+#define TEGRA20_MC_DISPLAY0B		2
+#define TEGRA20_MC_DISPLAY0BB		3
+#define TEGRA20_MC_DISPLAY0C		4
+#define TEGRA20_MC_DISPLAY0CB		5
+#define TEGRA20_MC_DISPLAY1B		6
+#define TEGRA20_MC_DISPLAY1BB		7
+#define TEGRA20_MC_EPPUP		8
+#define TEGRA20_MC_G2PR			9
+#define TEGRA20_MC_G2SR			10
+#define TEGRA20_MC_MPEUNIFBR		11
+#define TEGRA20_MC_VIRUV		12
+#define TEGRA20_MC_AVPCARM7R		13
+#define TEGRA20_MC_DISPLAYHC		14
+#define TEGRA20_MC_DISPLAYHCB		15
+#define TEGRA20_MC_FDCDRD		16
+#define TEGRA20_MC_G2DR			17
+#define TEGRA20_MC_HOST1XDMAR		18
+#define TEGRA20_MC_HOST1XR		19
+#define TEGRA20_MC_IDXSRD		20
+#define TEGRA20_MC_MPCORER		21
+#define TEGRA20_MC_MPE_IPRED		22
+#define TEGRA20_MC_MPEAMEMRD		23
+#define TEGRA20_MC_MPECSRD		24
+#define TEGRA20_MC_PPCSAHBDMAR		25
+#define TEGRA20_MC_PPCSAHBSLVR		26
+#define TEGRA20_MC_TEXSRD		27
+#define TEGRA20_MC_VDEBSEVR		28
+#define TEGRA20_MC_VDEMBER		29
+#define TEGRA20_MC_VDEMCER		30
+#define TEGRA20_MC_VDETPER		31
+#define TEGRA20_MC_EPPU			32
+#define TEGRA20_MC_EPPV			33
+#define TEGRA20_MC_EPPY			34
+#define TEGRA20_MC_MPEUNIFBW		35
+#define TEGRA20_MC_VIWSB		36
+#define TEGRA20_MC_VIWU			37
+#define TEGRA20_MC_VIWV			38
+#define TEGRA20_MC_VIWY			39
+#define TEGRA20_MC_G2DW			40
+#define TEGRA20_MC_AVPCARM7W		41
+#define TEGRA20_MC_FDCDWR		42
+#define TEGRA20_MC_HOST1XW		43
+#define TEGRA20_MC_ISPW			44
+#define TEGRA20_MC_MPCOREW		45
+#define TEGRA20_MC_MPECSWR		46
+#define TEGRA20_MC_PPCSAHBDMAW		47
+#define TEGRA20_MC_PPCSAHBSLVW		48
+#define TEGRA20_MC_VDEBSEVW		49
+#define TEGRA20_MC_VDEMBEW		50
+#define TEGRA20_MC_VDETPMW		51
+
 #endif
-- 
2.27.0

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  parent reply	other threads:[~2020-08-14  0:09 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-14  0:05 [PATCH v5 00/36] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
2020-08-14  0:05 ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 01/36] clk: Export clk_hw_reparent() Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 02/36] clk: tegra: Remove Memory Controller lock Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 03/36] clk: tegra: Export Tegra20 EMC kernel symbols Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 04/36] memory: tegra20-emc: Make driver modular Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 05/36] memory: tegra30-emc: " Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 06/36] memory: tegra124-emc: " Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 07/36] memory: tegra124-emc: Use devm_platform_ioremap_resource Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 08/36] soc/tegra: fuse: Export tegra_read_ram_code() Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 09/36] memory: tegra20-emc: Initialize MC timings Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 10/36] PM / devfreq: tegra20: Silence deferred probe error Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 11/36] PM / devfreq: tegra30: " Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 12/36] PM / devfreq: tegra20: Use MC timings for building OPP table Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  1:00   ` Chanwoo Choi
2020-08-14  1:00     ` Chanwoo Choi
2020-08-14  0:05 ` [PATCH v5 13/36] PM / devfreq: tegra30: " Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  2:02   ` Chanwoo Choi
2020-08-14  2:02     ` Chanwoo Choi
2020-08-14 16:47     ` Dmitry Osipenko
2020-08-14 16:47       ` Dmitry Osipenko
2020-08-28  1:47       ` Chanwoo Choi
2020-08-28  1:47         ` Chanwoo Choi
2020-08-28  8:30         ` Dmitry Osipenko
2020-08-28  8:30           ` Dmitry Osipenko
2020-08-14  0:05 ` [PATCH v5 14/36] PM / devfreq: tegra20: Add error messages to tegra_devfreq_target() Dmitry Osipenko
2020-08-14  0:05   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 15/36] PM / devfreq: tegra30: " Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 16/36] PM / devfreq: tegra20: Adjust clocks conversion ratio and polling interval Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 17/36] PM / devfreq: tegra20: Relax Kconfig dependency Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 18/36] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 19/36] dt-bindings: memory: tegra20: emc: " Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 20/36] dt-bindings: memory: tegra30: mc: " Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 21/36] dt-bindings: memory: tegra30: emc: " Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 22/36] dt-bindings: host1x: Document new interconnect properties Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-25  2:09   ` Rob Herring
2020-08-25  2:09     ` Rob Herring
2020-08-14  0:06 ` Dmitry Osipenko [this message]
2020-08-14  0:06   ` [PATCH v5 23/36] dt-bindings: memory: tegra20: Add memory client IDs Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 24/36] dt-bindings: memory: tegra30: " Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 25/36] ARM: tegra: Add interconnect properties to Tegra20 device-tree Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 26/36] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 27/36] memory: tegra-mc: Register as interconnect provider Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-09-09  8:31   ` Georgi Djakov
2020-09-09  8:31     ` Georgi Djakov
2020-09-09 21:15     ` Dmitry Osipenko
2020-09-09 21:15       ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 28/36] memory: tegra20-emc: Use devm_platform_ioremap_resource Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 29/36] memory: tegra20-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 30/36] memory: tegra20-emc: Register as interconnect provider Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-09-09  8:32   ` Georgi Djakov
2020-09-09  8:32     ` Georgi Djakov
2020-08-14  0:06 ` [PATCH v5 31/36] memory: tegra20-emc: Create tegra20-devfreq device Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 32/36] memory: tegra30-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 33/36] memory: tegra30-emc: Register as interconnect provider Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-09-09  8:32   ` Georgi Djakov
2020-09-09  8:32     ` Georgi Djakov
2020-08-14  0:06 ` [PATCH v5 34/36] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 35/36] drm/tegra: dc: Tune up high priority request controls for Tegra20 Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko
2020-08-14  0:06 ` [PATCH v5 36/36] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko
2020-08-14  0:06   ` Dmitry Osipenko

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