From: Joerg Roedel <joro@8bytes.org> To: x86@kernel.org Cc: Joerg Roedel <joro@8bytes.org>, Joerg Roedel <jroedel@suse.de>, Tom Lendacky <thomas.lendacky@amd.com>, hpa@zytor.com, Andy Lutomirski <luto@kernel.org>, Dave Hansen <dave.hansen@linux.intel.com>, Peter Zijlstra <peterz@infradead.org>, Jiri Slaby <jslaby@suse.cz>, Dan Williams <dan.j.williams@intel.com>, Juergen Gross <jgross@suse.com>, Kees Cook <keescook@chromium.org>, David Rientjes <rientjes@google.com>, Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>, Masami Hiramatsu <mhiramat@kernel.org>, Mike Stunes <mstunes@vmware.com>, Sean Christopherson <sean.j.christopherson@intel.com>, Martin Radev <martin.b.radev@gmail.com>, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, virtualization@lists.linux-foundation.org Subject: [PATCH v6 69/76] x86/realmode: Setup AP jump table Date: Mon, 24 Aug 2020 10:55:04 +0200 [thread overview] Message-ID: <20200824085511.7553-70-joro@8bytes.org> (raw) In-Reply-To: <20200824085511.7553-1-joro@8bytes.org> From: Tom Lendacky <thomas.lendacky@amd.com> As part of the GHCB specification, the booting of APs under SEV-ES requires an AP jump table when transitioning from one layer of code to another (e.g. when going from UEFI to the OS). As a result, each layer that parks an AP must provide the physical address of an AP jump table to the next layer via the hypervisor. Upon booting of the kernel, read the AP jump table address from the hypervisor. Under SEV-ES, APs are started using the INIT-SIPI-SIPI sequence. Before issuing the first SIPI request for an AP, the start CS and IP is programmed into the AP jump table. Upon issuing the SIPI request, the AP will awaken and jump to that start CS:IP address. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> [ jroedel@suse.de: - Adapted to different code base - Moved AP table setup from SIPI sending path to real-mode setup code - Fix sparse warnings ] Co-developed-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Joerg Roedel <jroedel@suse.de> Link: https://lore.kernel.org/r/20200724160336.5435-69-joro@8bytes.org --- arch/x86/include/asm/sev-es.h | 5 +++ arch/x86/include/uapi/asm/svm.h | 3 ++ arch/x86/kernel/sev-es.c | 68 +++++++++++++++++++++++++++++++++ arch/x86/realmode/init.c | 18 ++++++++- 4 files changed, 92 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h index 2dd19932a60d..6ca38dc378e0 100644 --- a/arch/x86/include/asm/sev-es.h +++ b/arch/x86/include/asm/sev-es.h @@ -73,6 +73,9 @@ static inline u64 lower_bits(u64 val, unsigned int bits) return (val & mask); } +struct real_mode_header; +enum stack_type; + /* Early IDT entry points for #VC handler */ extern void vc_no_ghcb(void); extern bool handle_vc_boot_ghcb(struct pt_regs *regs); @@ -91,9 +94,11 @@ static __always_inline void sev_es_ist_exit(void) if (static_branch_unlikely(&sev_es_enable_key)) __sev_es_ist_exit(); } +extern int sev_es_setup_ap_jump_table(struct real_mode_header *rmh); #else static inline void sev_es_ist_enter(struct pt_regs *regs) { } static inline void sev_es_ist_exit(void) { } +static inline int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) { return 0; } #endif #endif diff --git a/arch/x86/include/uapi/asm/svm.h b/arch/x86/include/uapi/asm/svm.h index 8f36ae021a7f..a19ce9681ec2 100644 --- a/arch/x86/include/uapi/asm/svm.h +++ b/arch/x86/include/uapi/asm/svm.h @@ -84,6 +84,9 @@ /* SEV-ES software-defined VMGEXIT events */ #define SVM_VMGEXIT_MMIO_READ 0x80000001 #define SVM_VMGEXIT_MMIO_WRITE 0x80000002 +#define SVM_VMGEXIT_AP_JUMP_TABLE 0x80000005 +#define SVM_VMGEXIT_SET_AP_JUMP_TABLE 0 +#define SVM_VMGEXIT_GET_AP_JUMP_TABLE 1 #define SVM_VMGEXIT_UNSUPPORTED_EVENT 0x8000ffff #define SVM_EXIT_ERR -1 diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c index 28fe95ecd508..09a45ccd6c1d 100644 --- a/arch/x86/kernel/sev-es.c +++ b/arch/x86/kernel/sev-es.c @@ -21,6 +21,8 @@ #include <linux/mm.h> #include <asm/cpu_entry_area.h> +#include <asm/stacktrace.h> +#include <asm/realmode.h> #include <asm/sev-es.h> #include <asm/insn-eval.h> #include <asm/fpu/internal.h> @@ -219,6 +221,9 @@ static __always_inline void sev_es_put_ghcb(struct ghcb_state *state) } } +/* Needed in vc_early_vc_forward_exception */ +void do_early_exception(struct pt_regs *regs, int trapnr); + static inline u64 sev_es_rd_ghcb_msr(void) { return native_read_msr(MSR_AMD64_SEV_ES_GHCB); @@ -407,6 +412,69 @@ static bool vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt, /* Include code shared with pre-decompression boot stage */ #include "sev-es-shared.c" +static u64 sev_es_get_jump_table_addr(void) +{ + struct ghcb_state state; + unsigned long flags; + struct ghcb *ghcb; + u64 ret; + + local_irq_save(flags); + + ghcb = sev_es_get_ghcb(&state); + + vc_ghcb_invalidate(ghcb); + ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE); + ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE); + ghcb_set_sw_exit_info_2(ghcb, 0); + + sev_es_wr_ghcb_msr(__pa(ghcb)); + VMGEXIT(); + + if (!ghcb_sw_exit_info_1_is_valid(ghcb) || + !ghcb_sw_exit_info_2_is_valid(ghcb)) + ret = 0; + + ret = ghcb->save.sw_exit_info_2; + + sev_es_put_ghcb(&state); + + local_irq_restore(flags); + + return ret; +} + +int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) +{ + u16 startup_cs, startup_ip; + phys_addr_t jump_table_pa; + u64 jump_table_addr; + u16 __iomem *jump_table; + + jump_table_addr = sev_es_get_jump_table_addr(); + + /* Check if AP Jump Table is non-zero and page-aligned */ + if (!jump_table_addr || jump_table_addr & ~PAGE_MASK) + return 0; + + jump_table_pa = jump_table_addr & PAGE_MASK; + + startup_cs = (u16)(rmh->trampoline_start >> 4); + startup_ip = (u16)(rmh->sev_es_trampoline_start - + rmh->trampoline_start); + + jump_table = ioremap_encrypted(jump_table_pa, PAGE_SIZE); + if (!jump_table) + return -EIO; + + writew(startup_ip, &jump_table[0]); + writew(startup_cs, &jump_table[1]); + + iounmap(jump_table); + + return 0; +} + static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt) { struct pt_regs *regs = ctxt->regs; diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index 1ed1208931e0..61a52b925d15 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -9,6 +9,7 @@ #include <asm/realmode.h> #include <asm/tlbflush.h> #include <asm/crash.h> +#include <asm/sev-es.h> struct real_mode_header *real_mode_header; u32 *trampoline_cr4_features; @@ -38,6 +39,19 @@ void __init reserve_real_mode(void) crash_reserve_low_1M(); } +static void sme_sev_setup_real_mode(struct trampoline_header *th) +{ +#ifdef CONFIG_AMD_MEM_ENCRYPT + if (sme_active()) + th->flags |= TH_FLAGS_SME_ACTIVE; + + if (sev_es_active()) { + if (sev_es_setup_ap_jump_table(real_mode_header)) + panic("Failed to update SEV-ES AP Jump Table"); + } +#endif +} + static void __init setup_real_mode(void) { u16 real_mode_seg; @@ -104,13 +118,13 @@ static void __init setup_real_mode(void) *trampoline_cr4_features = mmu_cr4_features; trampoline_header->flags = 0; - if (sme_active()) - trampoline_header->flags |= TH_FLAGS_SME_ACTIVE; trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd); trampoline_pgd[0] = trampoline_pgd_entry.pgd; trampoline_pgd[511] = init_top_pgt[511].pgd; #endif + + sme_sev_setup_real_mode(trampoline_header); } /* -- 2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org> To: x86@kernel.org Cc: Juergen Gross <jgross@suse.com>, Tom Lendacky <thomas.lendacky@amd.com>, Joerg Roedel <jroedel@suse.de>, Mike Stunes <mstunes@vmware.com>, Kees Cook <keescook@chromium.org>, kvm@vger.kernel.org, Peter Zijlstra <peterz@infradead.org>, Cfir Cohen <cfir@google.com>, Joerg Roedel <joro@8bytes.org>, Dave Hansen <dave.hansen@linux.intel.com>, linux-kernel@vger.kernel.org, Sean Christopherson <sean.j.christopherson@intel.com>, virtualization@lists.linux-foundation.org, Martin Radev <martin.b.radev@gmail.com>, Masami Hiramatsu <mhiramat@kernel.org>, Andy Lutomirski <luto@kernel.org>, hpa@zytor.com, Erdem Aktas <erdemaktas@google.com>, David Rientjes <rientjes@google.com>, Dan Williams <dan.j.williams@intel.com>, Jiri Slaby <jslaby@suse.cz> Subject: [PATCH v6 69/76] x86/realmode: Setup AP jump table Date: Mon, 24 Aug 2020 10:55:04 +0200 [thread overview] Message-ID: <20200824085511.7553-70-joro@8bytes.org> (raw) In-Reply-To: <20200824085511.7553-1-joro@8bytes.org> From: Tom Lendacky <thomas.lendacky@amd.com> As part of the GHCB specification, the booting of APs under SEV-ES requires an AP jump table when transitioning from one layer of code to another (e.g. when going from UEFI to the OS). As a result, each layer that parks an AP must provide the physical address of an AP jump table to the next layer via the hypervisor. Upon booting of the kernel, read the AP jump table address from the hypervisor. Under SEV-ES, APs are started using the INIT-SIPI-SIPI sequence. Before issuing the first SIPI request for an AP, the start CS and IP is programmed into the AP jump table. Upon issuing the SIPI request, the AP will awaken and jump to that start CS:IP address. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> [ jroedel@suse.de: - Adapted to different code base - Moved AP table setup from SIPI sending path to real-mode setup code - Fix sparse warnings ] Co-developed-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Joerg Roedel <jroedel@suse.de> Link: https://lore.kernel.org/r/20200724160336.5435-69-joro@8bytes.org --- arch/x86/include/asm/sev-es.h | 5 +++ arch/x86/include/uapi/asm/svm.h | 3 ++ arch/x86/kernel/sev-es.c | 68 +++++++++++++++++++++++++++++++++ arch/x86/realmode/init.c | 18 ++++++++- 4 files changed, 92 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h index 2dd19932a60d..6ca38dc378e0 100644 --- a/arch/x86/include/asm/sev-es.h +++ b/arch/x86/include/asm/sev-es.h @@ -73,6 +73,9 @@ static inline u64 lower_bits(u64 val, unsigned int bits) return (val & mask); } +struct real_mode_header; +enum stack_type; + /* Early IDT entry points for #VC handler */ extern void vc_no_ghcb(void); extern bool handle_vc_boot_ghcb(struct pt_regs *regs); @@ -91,9 +94,11 @@ static __always_inline void sev_es_ist_exit(void) if (static_branch_unlikely(&sev_es_enable_key)) __sev_es_ist_exit(); } +extern int sev_es_setup_ap_jump_table(struct real_mode_header *rmh); #else static inline void sev_es_ist_enter(struct pt_regs *regs) { } static inline void sev_es_ist_exit(void) { } +static inline int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) { return 0; } #endif #endif diff --git a/arch/x86/include/uapi/asm/svm.h b/arch/x86/include/uapi/asm/svm.h index 8f36ae021a7f..a19ce9681ec2 100644 --- a/arch/x86/include/uapi/asm/svm.h +++ b/arch/x86/include/uapi/asm/svm.h @@ -84,6 +84,9 @@ /* SEV-ES software-defined VMGEXIT events */ #define SVM_VMGEXIT_MMIO_READ 0x80000001 #define SVM_VMGEXIT_MMIO_WRITE 0x80000002 +#define SVM_VMGEXIT_AP_JUMP_TABLE 0x80000005 +#define SVM_VMGEXIT_SET_AP_JUMP_TABLE 0 +#define SVM_VMGEXIT_GET_AP_JUMP_TABLE 1 #define SVM_VMGEXIT_UNSUPPORTED_EVENT 0x8000ffff #define SVM_EXIT_ERR -1 diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c index 28fe95ecd508..09a45ccd6c1d 100644 --- a/arch/x86/kernel/sev-es.c +++ b/arch/x86/kernel/sev-es.c @@ -21,6 +21,8 @@ #include <linux/mm.h> #include <asm/cpu_entry_area.h> +#include <asm/stacktrace.h> +#include <asm/realmode.h> #include <asm/sev-es.h> #include <asm/insn-eval.h> #include <asm/fpu/internal.h> @@ -219,6 +221,9 @@ static __always_inline void sev_es_put_ghcb(struct ghcb_state *state) } } +/* Needed in vc_early_vc_forward_exception */ +void do_early_exception(struct pt_regs *regs, int trapnr); + static inline u64 sev_es_rd_ghcb_msr(void) { return native_read_msr(MSR_AMD64_SEV_ES_GHCB); @@ -407,6 +412,69 @@ static bool vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt, /* Include code shared with pre-decompression boot stage */ #include "sev-es-shared.c" +static u64 sev_es_get_jump_table_addr(void) +{ + struct ghcb_state state; + unsigned long flags; + struct ghcb *ghcb; + u64 ret; + + local_irq_save(flags); + + ghcb = sev_es_get_ghcb(&state); + + vc_ghcb_invalidate(ghcb); + ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE); + ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE); + ghcb_set_sw_exit_info_2(ghcb, 0); + + sev_es_wr_ghcb_msr(__pa(ghcb)); + VMGEXIT(); + + if (!ghcb_sw_exit_info_1_is_valid(ghcb) || + !ghcb_sw_exit_info_2_is_valid(ghcb)) + ret = 0; + + ret = ghcb->save.sw_exit_info_2; + + sev_es_put_ghcb(&state); + + local_irq_restore(flags); + + return ret; +} + +int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) +{ + u16 startup_cs, startup_ip; + phys_addr_t jump_table_pa; + u64 jump_table_addr; + u16 __iomem *jump_table; + + jump_table_addr = sev_es_get_jump_table_addr(); + + /* Check if AP Jump Table is non-zero and page-aligned */ + if (!jump_table_addr || jump_table_addr & ~PAGE_MASK) + return 0; + + jump_table_pa = jump_table_addr & PAGE_MASK; + + startup_cs = (u16)(rmh->trampoline_start >> 4); + startup_ip = (u16)(rmh->sev_es_trampoline_start - + rmh->trampoline_start); + + jump_table = ioremap_encrypted(jump_table_pa, PAGE_SIZE); + if (!jump_table) + return -EIO; + + writew(startup_ip, &jump_table[0]); + writew(startup_cs, &jump_table[1]); + + iounmap(jump_table); + + return 0; +} + static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt) { struct pt_regs *regs = ctxt->regs; diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index 1ed1208931e0..61a52b925d15 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -9,6 +9,7 @@ #include <asm/realmode.h> #include <asm/tlbflush.h> #include <asm/crash.h> +#include <asm/sev-es.h> struct real_mode_header *real_mode_header; u32 *trampoline_cr4_features; @@ -38,6 +39,19 @@ void __init reserve_real_mode(void) crash_reserve_low_1M(); } +static void sme_sev_setup_real_mode(struct trampoline_header *th) +{ +#ifdef CONFIG_AMD_MEM_ENCRYPT + if (sme_active()) + th->flags |= TH_FLAGS_SME_ACTIVE; + + if (sev_es_active()) { + if (sev_es_setup_ap_jump_table(real_mode_header)) + panic("Failed to update SEV-ES AP Jump Table"); + } +#endif +} + static void __init setup_real_mode(void) { u16 real_mode_seg; @@ -104,13 +118,13 @@ static void __init setup_real_mode(void) *trampoline_cr4_features = mmu_cr4_features; trampoline_header->flags = 0; - if (sme_active()) - trampoline_header->flags |= TH_FLAGS_SME_ACTIVE; trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd); trampoline_pgd[0] = trampoline_pgd_entry.pgd; trampoline_pgd[511] = init_top_pgt[511].pgd; #endif + + sme_sev_setup_real_mode(trampoline_header); } /* -- 2.28.0 _______________________________________________ Virtualization mailing list Virtualization@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/virtualization
next prev parent reply other threads:[~2020-08-24 9:03 UTC|newest] Thread overview: 226+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-08-24 8:53 [PATCH v6 00/76] x86: SEV-ES Guest Support Joerg Roedel 2020-08-24 8:53 ` Joerg Roedel 2020-08-24 8:53 ` [PATCH v6 01/76] KVM: SVM: nested: Don't allocate VMCB structures on stack Joerg Roedel 2020-08-24 8:53 ` Joerg Roedel 2020-08-24 8:53 ` [PATCH v6 02/76] KVM: SVM: Add GHCB definitions Joerg Roedel 2020-08-24 8:53 ` Joerg Roedel 2020-08-24 10:44 ` Borislav Petkov 2020-08-24 10:44 ` Borislav Petkov 2020-08-25 9:22 ` Joerg Roedel 2020-08-25 9:22 ` Joerg Roedel 2020-08-25 11:04 ` Borislav Petkov 2020-08-25 11:04 ` Borislav Petkov 2020-08-27 16:01 ` Arvind Sankar 2020-08-28 11:54 ` Joerg Roedel 2020-08-28 11:54 ` Joerg Roedel 2020-08-24 8:53 ` [PATCH v6 03/76] KVM: SVM: Add GHCB Accessor functions Joerg Roedel 2020-08-24 8:53 ` Joerg Roedel 2020-08-24 8:53 ` [PATCH v6 04/76] KVM: SVM: Use __packed shorthand Joerg Roedel 2020-08-24 8:53 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 05/76] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 06/76] x86/traps: Move pf error codes to <asm/trap_pf.h> Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 07/76] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 08/76] x86/umip: Factor out instruction fetch Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 09/76] x86/umip: Factor out instruction decoding Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 10/76] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 11/76] x86/insn: Add insn_has_rep_prefix() helper Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 12/76] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 13/76] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-27 15:26 ` Arvind Sankar 2020-08-28 12:12 ` Joerg Roedel 2020-08-28 12:12 ` Joerg Roedel 2020-08-28 15:09 ` Arvind Sankar 2020-08-24 8:54 ` [PATCH v6 14/76] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 15/76] x86/boot/compressed/64: Add page-fault handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 16/76] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 17/76] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 18/76] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 19/76] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 20/76] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-27 9:36 ` Borislav Petkov 2020-08-27 9:36 ` Borislav Petkov 2020-08-24 8:54 ` [PATCH v6 21/76] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 22/76] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 23/76] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 24/76] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 25/76] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 26/76] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 27/76] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-27 22:48 ` Arvind Sankar 2020-08-28 12:33 ` Joerg Roedel 2020-08-28 12:33 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 28/76] x86/idt: Move IDT to data segment Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 29/76] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-28 15:16 ` Borislav Petkov 2020-08-28 15:16 ` Borislav Petkov 2020-08-24 8:54 ` [PATCH v6 30/76] x86/head/64: Install startup GDT Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 31/76] x86/head/64: Setup MSR_GS_BASE before calling into C code Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-28 18:13 ` Borislav Petkov 2020-08-28 18:13 ` Borislav Petkov 2020-09-01 12:09 ` Joerg Roedel 2020-09-01 12:09 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 32/76] x86/head/64: Load GDT after switch to virtual addresses Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 33/76] x86/head/64: Load segment registers earlier Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 34/76] x86/head/64: Switch to initial stack earlier Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 35/76] x86/head/64: Make fixup_pointer() static inline Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 36/76] x86/head/64: Load IDT earlier Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-29 10:24 ` Borislav Petkov 2020-08-29 10:24 ` Borislav Petkov 2020-09-01 12:13 ` Joerg Roedel 2020-09-01 12:13 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 37/76] x86/head/64: Move early exception dispatch to C code Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 38/76] x86/head/64: Set CR4.FSGSBASE early Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-29 15:55 ` Borislav Petkov 2020-08-29 15:55 ` Borislav Petkov 2020-08-31 8:58 ` Joerg Roedel 2020-08-31 8:58 ` Joerg Roedel 2020-08-31 9:26 ` Borislav Petkov 2020-08-31 9:26 ` Borislav Petkov 2020-08-24 8:54 ` [PATCH v6 39/76] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-29 16:25 ` Borislav Petkov 2020-08-29 16:25 ` Borislav Petkov 2020-08-24 8:54 ` [PATCH v6 40/76] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 41/76] x86/sev-es: Compile early handler code into kernel image Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 42/76] x86/sev-es: Setup early #VC handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-31 9:45 ` Borislav Petkov 2020-08-31 9:45 ` Borislav Petkov 2020-09-01 12:59 ` Joerg Roedel 2020-09-01 12:59 ` Joerg Roedel 2020-09-01 13:35 ` Borislav Petkov 2020-09-01 13:35 ` Borislav Petkov 2021-09-04 9:39 ` Lai Jiangshan 2021-09-06 5:07 ` Juergen Gross via Virtualization 2021-09-06 5:07 ` Juergen Gross 2020-08-24 8:54 ` [PATCH v6 43/76] x86/sev-es: Setup GHCB based boot " Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 44/76] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 45/76] x86/sev-es: Allocate and Map IST stack for #VC handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-31 10:27 ` Borislav Petkov 2020-08-31 10:27 ` Borislav Petkov 2020-08-24 8:54 ` [PATCH v6 46/76] x86/sev-es: Adjust #VC IST Stack on entering NMI handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-31 11:05 ` Borislav Petkov 2020-08-31 11:05 ` Borislav Petkov 2020-08-24 8:54 ` [PATCH v6 47/76] x86/dumpstack/64: Add noinstr version of get_stack_info() Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-31 11:11 ` Borislav Petkov 2020-08-31 11:11 ` Borislav Petkov 2020-08-24 8:54 ` [PATCH v6 48/76] x86/entry/64: Add entry code for #VC handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-31 11:30 ` Borislav Petkov 2020-08-31 11:30 ` Borislav Petkov 2020-09-01 13:29 ` Joerg Roedel 2020-09-01 13:29 ` Joerg Roedel 2020-08-31 17:30 ` Borislav Petkov 2020-08-31 17:30 ` Borislav Petkov 2020-08-24 8:54 ` [PATCH v6 49/76] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 50/76] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 51/76] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 52/76] x86/sev-es: Handle MMIO events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-31 15:47 ` Borislav Petkov 2020-08-31 15:47 ` Borislav Petkov 2020-08-24 8:54 ` [PATCH v6 53/76] x86/sev-es: Handle MMIO String Instructions Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 54/76] x86/sev-es: Handle MSR events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 55/76] x86/sev-es: Handle DR7 read/write events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 56/76] x86/sev-es: Handle WBINVD Events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 57/76] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 58/76] x86/sev-es: Handle RDPMC Events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 59/76] x86/sev-es: Handle INVD Events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 60/76] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 61/76] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 62/76] x86/sev-es: Handle VMMCALL Events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 63/76] x86/sev-es: Handle #AC Events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-24 8:54 ` [PATCH v6 64/76] x86/sev-es: Handle #DB Events Joerg Roedel 2020-08-24 8:54 ` Joerg Roedel 2020-08-31 16:19 ` Borislav Petkov 2020-08-31 16:19 ` Borislav Petkov 2020-08-24 8:55 ` [PATCH v6 65/76] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-24 8:55 ` [PATCH v6 66/76] x86/kvm: Add KVM " Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-24 8:55 ` [PATCH v6 67/76] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-24 8:55 ` [PATCH v6 68/76] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel [this message] 2020-08-24 8:55 ` [PATCH v6 69/76] x86/realmode: Setup AP jump table Joerg Roedel 2020-08-31 17:09 ` Borislav Petkov 2020-08-31 17:09 ` Borislav Petkov 2020-09-01 13:55 ` Joerg Roedel 2020-09-01 13:55 ` Joerg Roedel 2020-08-24 8:55 ` [PATCH v6 70/76] x86/smpboot: Setup TSS for starting AP Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-31 17:25 ` Borislav Petkov 2020-08-31 17:25 ` Borislav Petkov 2020-08-24 8:55 ` [PATCH v6 71/76] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-24 8:55 ` [PATCH v6 72/76] x86/head/64: Rename start_cpu0 Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-31 17:29 ` Borislav Petkov 2020-08-31 17:29 ` Borislav Petkov 2020-08-24 8:55 ` [PATCH v6 73/76] x86/sev-es: Support CPU offline/online Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-24 8:55 ` [PATCH v6 74/76] x86/sev-es: Handle NMI State Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-24 8:55 ` [PATCH v6 75/76] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-24 8:55 ` [PATCH v6 76/76] x86/sev-es: Check required CPU features for SEV-ES Joerg Roedel 2020-08-24 8:55 ` Joerg Roedel 2020-08-25 0:21 ` [PATCH v6 00/76] x86: SEV-ES Guest Support Mike Stunes 2020-08-25 6:24 ` Joerg Roedel 2020-08-25 6:24 ` Joerg Roedel
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