From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [patch V2 34/46] PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable
Date: Wed, 26 Aug 2020 23:34:55 +0800 [thread overview]
Message-ID: <202008262349.dVUPN60x%lkp@intel.com> (raw)
In-Reply-To: <20200826112333.992429909@linutronix.de>
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Hi Thomas,
I love your patch! Yet something to improve:
[auto build test ERROR on pci/next]
[also build test ERROR on v5.9-rc2 next-20200826]
[cannot apply to tip/x86/core iommu/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Thomas-Gleixner/x86-PCI-XEN-genirq-Prepare-for-device-MSI/20200826-201642
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: s390-allyesconfig (attached as .config)
compiler: s390-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=s390
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> arch/s390/pci/pci_irq.c:234:5: error: redefinition of 'arch_setup_msi_irqs'
234 | int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
| ^~~~~~~~~~~~~~~~~~~
In file included from arch/s390/include/asm/hw_irq.h:5,
from include/linux/irq.h:576,
from arch/s390/pci/pci_irq.c:6:
include/linux/msi.h:211:19: note: previous definition of 'arch_setup_msi_irqs' was here
211 | static inline int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
| ^~~~~~~~~~~~~~~~~~~
>> arch/s390/pci/pci_irq.c:318:6: error: redefinition of 'arch_teardown_msi_irqs'
318 | void arch_teardown_msi_irqs(struct pci_dev *pdev)
| ^~~~~~~~~~~~~~~~~~~~~~
In file included from arch/s390/include/asm/hw_irq.h:5,
from include/linux/irq.h:576,
from arch/s390/pci/pci_irq.c:6:
include/linux/msi.h:217:20: note: previous definition of 'arch_teardown_msi_irqs' was here
217 | static inline void arch_teardown_msi_irqs(struct pci_dev *dev)
| ^~~~~~~~~~~~~~~~~~~~~~
# https://github.com/0day-ci/linux/commit/82f0dd259254d59d8f59734890f7f2d3d64216fa
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Thomas-Gleixner/x86-PCI-XEN-genirq-Prepare-for-device-MSI/20200826-201642
git checkout 82f0dd259254d59d8f59734890f7f2d3d64216fa
vim +/arch_setup_msi_irqs +234 arch/s390/pci/pci_irq.c
c840927cf5f24d Sebastian Ott 2019-02-12 233
c840927cf5f24d Sebastian Ott 2019-02-12 @234 int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
c840927cf5f24d Sebastian Ott 2019-02-12 235 {
c840927cf5f24d Sebastian Ott 2019-02-12 236 struct zpci_dev *zdev = to_zpci(pdev);
e979ce7bced2ee Sebastian Ott 2018-09-27 237 unsigned int hwirq, msi_vecs, cpu;
e979ce7bced2ee Sebastian Ott 2018-09-27 238 unsigned long bit;
c840927cf5f24d Sebastian Ott 2019-02-12 239 struct msi_desc *msi;
c840927cf5f24d Sebastian Ott 2019-02-12 240 struct msi_msg msg;
c840927cf5f24d Sebastian Ott 2019-02-12 241 int rc, irq;
c840927cf5f24d Sebastian Ott 2019-02-12 242
c840927cf5f24d Sebastian Ott 2019-02-12 243 zdev->aisb = -1UL;
e979ce7bced2ee Sebastian Ott 2018-09-27 244 zdev->msi_first_bit = -1U;
c840927cf5f24d Sebastian Ott 2019-02-12 245 if (type == PCI_CAP_ID_MSI && nvec > 1)
c840927cf5f24d Sebastian Ott 2019-02-12 246 return 1;
c840927cf5f24d Sebastian Ott 2019-02-12 247 msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
c840927cf5f24d Sebastian Ott 2019-02-12 248
e979ce7bced2ee Sebastian Ott 2018-09-27 249 if (irq_delivery == DIRECTED) {
e979ce7bced2ee Sebastian Ott 2018-09-27 250 /* Allocate cpu vector bits */
e979ce7bced2ee Sebastian Ott 2018-09-27 251 bit = airq_iv_alloc(zpci_ibv[0], msi_vecs);
e979ce7bced2ee Sebastian Ott 2018-09-27 252 if (bit == -1UL)
e979ce7bced2ee Sebastian Ott 2018-09-27 253 return -EIO;
e979ce7bced2ee Sebastian Ott 2018-09-27 254 } else {
c840927cf5f24d Sebastian Ott 2019-02-12 255 /* Allocate adapter summary indicator bit */
e979ce7bced2ee Sebastian Ott 2018-09-27 256 bit = airq_iv_alloc_bit(zpci_sbv);
e979ce7bced2ee Sebastian Ott 2018-09-27 257 if (bit == -1UL)
c840927cf5f24d Sebastian Ott 2019-02-12 258 return -EIO;
e979ce7bced2ee Sebastian Ott 2018-09-27 259 zdev->aisb = bit;
c840927cf5f24d Sebastian Ott 2019-02-12 260
c840927cf5f24d Sebastian Ott 2019-02-12 261 /* Create adapter interrupt vector */
c840927cf5f24d Sebastian Ott 2019-02-12 262 zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
c840927cf5f24d Sebastian Ott 2019-02-12 263 if (!zdev->aibv)
c840927cf5f24d Sebastian Ott 2019-02-12 264 return -ENOMEM;
c840927cf5f24d Sebastian Ott 2019-02-12 265
c840927cf5f24d Sebastian Ott 2019-02-12 266 /* Wire up shortcut pointer */
e979ce7bced2ee Sebastian Ott 2018-09-27 267 zpci_ibv[bit] = zdev->aibv;
e979ce7bced2ee Sebastian Ott 2018-09-27 268 /* Each function has its own interrupt vector */
e979ce7bced2ee Sebastian Ott 2018-09-27 269 bit = 0;
e979ce7bced2ee Sebastian Ott 2018-09-27 270 }
c840927cf5f24d Sebastian Ott 2019-02-12 271
c840927cf5f24d Sebastian Ott 2019-02-12 272 /* Request MSI interrupts */
e979ce7bced2ee Sebastian Ott 2018-09-27 273 hwirq = bit;
c840927cf5f24d Sebastian Ott 2019-02-12 274 for_each_pci_msi_entry(msi, pdev) {
e979ce7bced2ee Sebastian Ott 2018-09-27 275 rc = -EIO;
e979ce7bced2ee Sebastian Ott 2018-09-27 276 if (hwirq - bit >= msi_vecs)
c840927cf5f24d Sebastian Ott 2019-02-12 277 break;
86dbf32da15033 Niklas Schnelle 2020-04-16 278 irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE,
86dbf32da15033 Niklas Schnelle 2020-04-16 279 (irq_delivery == DIRECTED) ?
86dbf32da15033 Niklas Schnelle 2020-04-16 280 msi->affinity : NULL);
c840927cf5f24d Sebastian Ott 2019-02-12 281 if (irq < 0)
c840927cf5f24d Sebastian Ott 2019-02-12 282 return -ENOMEM;
c840927cf5f24d Sebastian Ott 2019-02-12 283 rc = irq_set_msi_desc(irq, msi);
c840927cf5f24d Sebastian Ott 2019-02-12 284 if (rc)
c840927cf5f24d Sebastian Ott 2019-02-12 285 return rc;
c840927cf5f24d Sebastian Ott 2019-02-12 286 irq_set_chip_and_handler(irq, &zpci_irq_chip,
e979ce7bced2ee Sebastian Ott 2018-09-27 287 handle_percpu_irq);
cf2c4a3f35b75d Sebastian Ott 2019-09-10 288 msg.data = hwirq - bit;
e979ce7bced2ee Sebastian Ott 2018-09-27 289 if (irq_delivery == DIRECTED) {
e979ce7bced2ee Sebastian Ott 2018-09-27 290 msg.address_lo = zdev->msi_addr & 0xff0000ff;
e979ce7bced2ee Sebastian Ott 2018-09-27 291 msg.address_lo |= msi->affinity ?
e979ce7bced2ee Sebastian Ott 2018-09-27 292 (cpumask_first(&msi->affinity->mask) << 8) : 0;
e979ce7bced2ee Sebastian Ott 2018-09-27 293 for_each_possible_cpu(cpu) {
e979ce7bced2ee Sebastian Ott 2018-09-27 294 airq_iv_set_data(zpci_ibv[cpu], hwirq, irq);
e979ce7bced2ee Sebastian Ott 2018-09-27 295 }
e979ce7bced2ee Sebastian Ott 2018-09-27 296 } else {
c840927cf5f24d Sebastian Ott 2019-02-12 297 msg.address_lo = zdev->msi_addr & 0xffffffff;
e979ce7bced2ee Sebastian Ott 2018-09-27 298 airq_iv_set_data(zdev->aibv, hwirq, irq);
e979ce7bced2ee Sebastian Ott 2018-09-27 299 }
c840927cf5f24d Sebastian Ott 2019-02-12 300 msg.address_hi = zdev->msi_addr >> 32;
c840927cf5f24d Sebastian Ott 2019-02-12 301 pci_write_msi_msg(irq, &msg);
c840927cf5f24d Sebastian Ott 2019-02-12 302 hwirq++;
c840927cf5f24d Sebastian Ott 2019-02-12 303 }
c840927cf5f24d Sebastian Ott 2019-02-12 304
e979ce7bced2ee Sebastian Ott 2018-09-27 305 zdev->msi_first_bit = bit;
e979ce7bced2ee Sebastian Ott 2018-09-27 306 zdev->msi_nr_irqs = msi_vecs;
e979ce7bced2ee Sebastian Ott 2018-09-27 307
e979ce7bced2ee Sebastian Ott 2018-09-27 308 if (irq_delivery == DIRECTED)
e979ce7bced2ee Sebastian Ott 2018-09-27 309 rc = zpci_set_directed_irq(zdev);
e979ce7bced2ee Sebastian Ott 2018-09-27 310 else
c840927cf5f24d Sebastian Ott 2019-02-12 311 rc = zpci_set_airq(zdev);
c840927cf5f24d Sebastian Ott 2019-02-12 312 if (rc)
c840927cf5f24d Sebastian Ott 2019-02-12 313 return rc;
c840927cf5f24d Sebastian Ott 2019-02-12 314
c840927cf5f24d Sebastian Ott 2019-02-12 315 return (msi_vecs == nvec) ? 0 : msi_vecs;
c840927cf5f24d Sebastian Ott 2019-02-12 316 }
c840927cf5f24d Sebastian Ott 2019-02-12 317
c840927cf5f24d Sebastian Ott 2019-02-12 @318 void arch_teardown_msi_irqs(struct pci_dev *pdev)
c840927cf5f24d Sebastian Ott 2019-02-12 319 {
c840927cf5f24d Sebastian Ott 2019-02-12 320 struct zpci_dev *zdev = to_zpci(pdev);
c840927cf5f24d Sebastian Ott 2019-02-12 321 struct msi_desc *msi;
c840927cf5f24d Sebastian Ott 2019-02-12 322 int rc;
c840927cf5f24d Sebastian Ott 2019-02-12 323
e979ce7bced2ee Sebastian Ott 2018-09-27 324 /* Disable interrupts */
e979ce7bced2ee Sebastian Ott 2018-09-27 325 if (irq_delivery == DIRECTED)
e979ce7bced2ee Sebastian Ott 2018-09-27 326 rc = zpci_clear_directed_irq(zdev);
e979ce7bced2ee Sebastian Ott 2018-09-27 327 else
c840927cf5f24d Sebastian Ott 2019-02-12 328 rc = zpci_clear_airq(zdev);
c840927cf5f24d Sebastian Ott 2019-02-12 329 if (rc)
c840927cf5f24d Sebastian Ott 2019-02-12 330 return;
c840927cf5f24d Sebastian Ott 2019-02-12 331
c840927cf5f24d Sebastian Ott 2019-02-12 332 /* Release MSI interrupts */
c840927cf5f24d Sebastian Ott 2019-02-12 333 for_each_pci_msi_entry(msi, pdev) {
c840927cf5f24d Sebastian Ott 2019-02-12 334 if (!msi->irq)
c840927cf5f24d Sebastian Ott 2019-02-12 335 continue;
c840927cf5f24d Sebastian Ott 2019-02-12 336 if (msi->msi_attrib.is_msix)
c840927cf5f24d Sebastian Ott 2019-02-12 337 __pci_msix_desc_mask_irq(msi, 1);
c840927cf5f24d Sebastian Ott 2019-02-12 338 else
c840927cf5f24d Sebastian Ott 2019-02-12 339 __pci_msi_desc_mask_irq(msi, 1, 1);
c840927cf5f24d Sebastian Ott 2019-02-12 340 irq_set_msi_desc(msi->irq, NULL);
c840927cf5f24d Sebastian Ott 2019-02-12 341 irq_free_desc(msi->irq);
c840927cf5f24d Sebastian Ott 2019-02-12 342 msi->msg.address_lo = 0;
c840927cf5f24d Sebastian Ott 2019-02-12 343 msi->msg.address_hi = 0;
c840927cf5f24d Sebastian Ott 2019-02-12 344 msi->msg.data = 0;
c840927cf5f24d Sebastian Ott 2019-02-12 345 msi->irq = 0;
c840927cf5f24d Sebastian Ott 2019-02-12 346 }
c840927cf5f24d Sebastian Ott 2019-02-12 347
c840927cf5f24d Sebastian Ott 2019-02-12 348 if (zdev->aisb != -1UL) {
b1f548645cb587 Sebastian Ott 2019-02-14 349 zpci_ibv[zdev->aisb] = NULL;
b1f548645cb587 Sebastian Ott 2019-02-14 350 airq_iv_free_bit(zpci_sbv, zdev->aisb);
c840927cf5f24d Sebastian Ott 2019-02-12 351 zdev->aisb = -1UL;
c840927cf5f24d Sebastian Ott 2019-02-12 352 }
c840927cf5f24d Sebastian Ott 2019-02-12 353 if (zdev->aibv) {
c840927cf5f24d Sebastian Ott 2019-02-12 354 airq_iv_release(zdev->aibv);
c840927cf5f24d Sebastian Ott 2019-02-12 355 zdev->aibv = NULL;
c840927cf5f24d Sebastian Ott 2019-02-12 356 }
e979ce7bced2ee Sebastian Ott 2018-09-27 357
e979ce7bced2ee Sebastian Ott 2018-09-27 358 if ((irq_delivery == DIRECTED) && zdev->msi_first_bit != -1U)
e979ce7bced2ee Sebastian Ott 2018-09-27 359 airq_iv_free(zpci_ibv[0], zdev->msi_first_bit, zdev->msi_nr_irqs);
c840927cf5f24d Sebastian Ott 2019-02-12 360 }
c840927cf5f24d Sebastian Ott 2019-02-12 361
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
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next prev parent reply other threads:[~2020-08-26 15:34 UTC|newest]
Thread overview: 294+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-26 11:16 [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-26 11:16 ` [patch V2 01/46] iommu/amd: Prevent NULL pointer dereference Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-27 14:57 ` Joerg Roedel
2020-08-27 14:57 ` Joerg Roedel
2020-08-26 11:16 ` [patch V2 02/46] x86/init: Remove unused init ops Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 03/46] PCI: vmd: Dont abuse vector irqomain as parent Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 04/46] genirq/chip: Use the first chip in irq_chip_compose_msi_msg() Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-26 19:50 ` Marc Zyngier
2020-08-26 19:50 ` Marc Zyngier
2020-08-26 21:19 ` Thomas Gleixner
2020-08-26 21:19 ` Thomas Gleixner
2020-08-26 21:32 ` Marc Zyngier
2020-08-26 21:32 ` Marc Zyngier
2020-08-26 11:16 ` [patch V2 05/46] x86/msi: Move compose message callback where it belongs Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 06/46] x86/msi: Remove pointless vcpu_affinity callback Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 07/46] x86/irq: Rename X86_IRQ_ALLOC_TYPE_MSI* to reflect PCI dependency Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] x86_irq_Rename_X86_IRQ_ALLOC_TYPE_MSI_to_reflect_PCI_dependency tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 08/46] x86/irq: Add allocation type for parent domain retrieval Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 09/46] iommu/vt-d: Consolidate irq domain getter Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 10/46] iommu/amd: " Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 11/46] iommu/irq_remapping: Consolidate irq domain lookup Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 12/46] x86/irq: Prepare consolidation of irq_alloc_info Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 13/46] x86/msi: Consolidate HPET allocation Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 14/46] x86/ioapic: Consolidate IOAPIC allocation Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-08 13:35 ` Wei Liu
2020-09-08 13:35 ` Wei Liu
2020-09-16 15:12 ` [tip: x86/irq] x86_ioapic_Consolidate_IOAPIC_allocation tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 15/46] x86/irq: Consolidate DMAR irq allocation Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-26 16:50 ` Dey, Megha
2020-08-26 16:50 ` Dey, Megha
2020-08-26 16:50 ` Dey, Megha
2020-08-26 18:32 ` Thomas Gleixner
2020-08-26 18:32 ` Thomas Gleixner
2020-08-26 20:50 ` Thomas Gleixner
2020-08-26 20:50 ` Thomas Gleixner
2020-08-28 0:12 ` Dey, Megha
2020-08-28 0:12 ` Dey, Megha
2020-08-28 0:12 ` Dey, Megha
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 16/46] x86/irq: Consolidate UV domain allocation Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 17/46] PCI/MSI: Rework pci_msi_domain_calc_hwirq() Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-26 20:24 ` Marc Zyngier
2020-08-26 20:24 ` Marc Zyngier
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 18/46] x86/msi: Consolidate MSI allocation Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-08 13:36 ` Wei Liu
2020-09-08 13:36 ` Wei Liu
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 19/46] x86/msi: Use generic MSI domain ops Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-26 20:21 ` Marc Zyngier
2020-08-26 20:21 ` Marc Zyngier
2020-08-26 20:43 ` Thomas Gleixner
2020-08-26 20:43 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 20/46] x86/irq: Move apic_post_init() invocation to one place Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 21/46] x86/pci: Reducde #ifdeffery in PCI init code Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 22/46] x86/irq: Initialize PCI/MSI domain at PCI init time Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 23/46] irqdomain/msi: Provide DOMAIN_BUS_VMD_MSI Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-26 20:42 ` Marc Zyngier
2020-08-26 20:42 ` Marc Zyngier
2020-08-26 20:57 ` Derrick, Jonathan
2020-08-26 20:57 ` Derrick, Jonathan
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 24/46] PCI: vmd: Mark VMD irqdomain with DOMAIN_BUS_VMD_MSI Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-26 20:47 ` Marc Zyngier
2020-08-26 20:47 ` Marc Zyngier
2020-08-31 14:39 ` Jason Gunthorpe
2020-08-31 14:39 ` Jason Gunthorpe
2020-09-30 12:45 ` Derrick, Jonathan
2020-09-30 12:45 ` Derrick, Jonathan
2020-09-30 12:57 ` Jason Gunthorpe
2020-09-30 12:57 ` Jason Gunthorpe
2020-09-30 13:08 ` Derrick, Jonathan
2020-09-30 13:08 ` Derrick, Jonathan
2020-09-30 18:47 ` Jason Gunthorpe
2020-09-30 18:47 ` Jason Gunthorpe
2020-09-16 15:12 ` [tip: x86/irq] PCI_vmd_Mark_VMD_irqdomain_with_DOMAIN_BUS_VMD_MSI tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 25/46] PCI/MSI: Provide pci_dev_has_special_msi_domain() helper Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 26/46] x86/xen: Make xen_msi_init() static and rename it to xen_hvm_msi_init() Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 27/46] x86/xen: Rework MSI teardown Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-27 7:46 ` Jürgen Groß
2020-08-27 7:46 ` Jürgen Groß
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 28/46] x86/xen: Consolidate XEN-MSI init Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-27 7:47 ` Jürgen Groß
2020-08-27 7:47 ` Jürgen Groß
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 29/46] irqdomain/msi: Allow to override msi_domain_alloc/free_irqs() Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-08-26 19:06 ` Marc Zyngier
2020-08-26 19:06 ` Marc Zyngier
2020-08-26 19:47 ` Thomas Gleixner
2020-08-26 19:47 ` Thomas Gleixner
2020-08-26 21:33 ` Marc Zyngier
2020-08-26 21:33 ` Marc Zyngier
2020-08-28 0:24 ` Dey, Megha
2020-08-28 0:24 ` Dey, Megha
2020-08-28 0:24 ` Dey, Megha
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:16 ` [patch V2 30/46] x86/xen: Wrap XEN MSI management into irqdomain Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2023-01-15 14:12 ` [patch V2 30/46] " David Woodhouse
2023-01-15 20:27 ` David Woodhouse
2020-08-26 11:16 ` [patch V2 31/46] iommm/vt-d: Store irq domain in struct device Thomas Gleixner
2020-08-26 11:16 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:17 ` [patch V2 32/46] iommm/amd: " Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:17 ` [patch V2 33/46] x86/pci: Set default irq domain in pcibios_add_device() Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:17 ` [patch V2 34/46] PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-08-26 15:34 ` kernel test robot [this message]
2020-08-26 15:53 ` Thomas Gleixner
2020-08-26 15:53 ` Thomas Gleixner
2020-08-26 16:23 ` kernel test robot
2020-08-26 21:14 ` Marc Zyngier
2020-08-26 21:14 ` Marc Zyngier
2020-08-26 21:27 ` Thomas Gleixner
2020-08-26 21:27 ` Thomas Gleixner
2020-08-27 18:20 ` Bjorn Helgaas
2020-08-27 18:20 ` Bjorn Helgaas
2020-08-28 11:21 ` Lorenzo Pieralisi
2020-08-28 11:21 ` Lorenzo Pieralisi
2020-08-28 12:19 ` Jason Gunthorpe
2020-08-28 12:19 ` Jason Gunthorpe
2020-08-28 12:19 ` Jason Gunthorpe
2020-08-28 12:19 ` Jason Gunthorpe
2020-08-28 12:47 ` Marc Zyngier
2020-08-28 12:47 ` Marc Zyngier
2020-08-28 12:54 ` Jason Gunthorpe
2020-08-28 12:54 ` Jason Gunthorpe
2020-08-28 12:54 ` Jason Gunthorpe
2020-08-28 13:52 ` Marc Zyngier
2020-08-28 13:52 ` Marc Zyngier
2020-08-28 18:29 ` Thomas Gleixner
2020-08-28 18:29 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-09-25 13:54 ` [patch V2 34/46] " Qian Cai
2020-09-25 13:54 ` Qian Cai
2020-09-25 13:54 ` Qian Cai
2020-09-26 12:38 ` Vasily Gorbik
2020-09-26 12:38 ` Vasily Gorbik
2020-09-28 10:11 ` Thomas Gleixner
2020-09-28 10:11 ` Thomas Gleixner
2020-08-26 11:17 ` [patch V2 35/46] x86/irq: Cleanup the arch_*_msi_irqs() leftovers Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:17 ` [patch V2 36/46] x86/irq: Make most MSI ops XEN private Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:17 ` [patch V2 37/46] iommu/vt-d: Remove domain search for PCI/MSI[X] Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:17 ` [patch V2 38/46] iommu/amd: Remove domain search for PCI/MSI Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-09-16 15:12 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-08-26 11:17 ` [patch V2 39/46] x86/irq: Add DEV_MSI allocation type Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-08-26 11:17 ` [patch V2 40/46] x86/msi: Rename and rework pci_msi_prepare() to cover non-PCI MSI Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-08-26 11:17 ` [patch V2 41/46] platform-msi: Provide default irq_chip:: Ack Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-08-26 21:25 ` Marc Zyngier
2020-08-26 21:25 ` Marc Zyngier
2020-08-26 11:17 ` [patch V2 42/46] genirq/proc: Take buslock on affinity write Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-08-26 11:17 ` [patch V2 43/46] genirq/msi: Provide and use msi_domain_set_default_info_flags() Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-08-27 8:17 ` Marc Zyngier
2020-08-27 8:17 ` Marc Zyngier
2020-08-28 18:42 ` Thomas Gleixner
2020-08-28 18:42 ` Thomas Gleixner
2020-08-26 11:17 ` [patch V2 44/46] platform-msi: Add device MSI infrastructure Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-08-26 11:17 ` [patch V2 45/46] irqdomain/msi: Provide msi_alloc/free_store() callbacks Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-08-26 11:17 ` [patch V2 46/46] irqchip: Add IMS (Interrupt Message Storm) driver - NOT FOR MERGING Thomas Gleixner
2020-08-26 11:17 ` Thomas Gleixner
2020-08-31 14:45 ` Jason Gunthorpe
2020-08-31 14:45 ` Jason Gunthorpe
2020-08-28 11:41 ` [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI Joerg Roedel
2020-08-28 11:41 ` Joerg Roedel
2020-08-31 0:51 ` Lu Baolu
2020-08-31 0:51 ` Lu Baolu
2020-08-31 0:51 ` Lu Baolu
2020-08-31 7:10 ` Thomas Gleixner
2020-08-31 7:10 ` Thomas Gleixner
2020-08-31 7:29 ` Lu Baolu
2020-08-31 7:29 ` Lu Baolu
2020-08-31 7:29 ` Lu Baolu
2020-09-01 9:06 ` Boqun Feng
2020-09-01 9:06 ` Boqun Feng
2020-09-01 9:06 ` Boqun Feng
2020-09-03 16:35 ` Raj, Ashok
2020-09-03 16:35 ` Raj, Ashok
2020-09-03 18:12 ` Thomas Gleixner
2020-09-03 18:12 ` Thomas Gleixner
2020-09-08 3:39 ` Russ Anderson
2020-09-08 3:39 ` Russ Anderson
2020-09-25 15:29 ` Qian Cai
2020-09-25 15:29 ` Qian Cai
2020-09-25 15:29 ` Qian Cai
2020-09-25 15:49 ` Peter Zijlstra
2020-09-25 15:49 ` Peter Zijlstra
2020-09-25 23:14 ` Thomas Gleixner
2020-09-25 23:14 ` Thomas Gleixner
2020-09-27 8:46 ` [PATCH] x86/apic/msi: Unbreak DMAR and HPET MSI Thomas Gleixner
2020-09-27 8:46 ` Thomas Gleixner
2020-09-27 19:57 ` [tip: x86/irq] " tip-bot2 for Thomas Gleixner
2020-09-29 23:03 ` [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI Dey, Megha
2020-09-29 23:03 ` Dey, Megha
2020-09-30 6:41 ` Thomas Gleixner
2020-09-30 6:41 ` Thomas Gleixner
2020-09-30 11:43 ` Jason Gunthorpe
2020-09-30 11:43 ` Jason Gunthorpe
2020-09-30 15:20 ` Thomas Gleixner
2020-09-30 15:20 ` Thomas Gleixner
2020-09-30 17:25 ` Dey, Megha
2020-09-30 17:25 ` Dey, Megha
2020-09-30 18:11 ` Thomas Gleixner
2020-09-30 18:11 ` Thomas Gleixner
2020-11-12 12:55 ` REGRESSION: " Jason Gunthorpe
2020-11-12 12:55 ` Jason Gunthorpe
2020-11-12 14:15 ` Thomas Gleixner
2020-11-12 14:15 ` Thomas Gleixner
2020-11-12 15:18 ` Thomas Gleixner
2020-11-12 15:18 ` Thomas Gleixner
2020-11-12 19:15 ` iommu/vt-d: Cure VF irqdomain hickup Thomas Gleixner
2020-11-12 19:15 ` Thomas Gleixner
2020-11-12 21:34 ` Thomas Gleixner
2020-11-12 21:34 ` Thomas Gleixner
2020-11-13 9:19 ` Marc Zyngier
2020-11-13 9:19 ` Marc Zyngier
2020-11-13 13:52 ` Thomas Gleixner
2020-11-13 13:52 ` Thomas Gleixner
2020-11-13 7:20 ` Lu Baolu
2020-11-13 7:20 ` Lu Baolu
2020-11-16 9:47 ` Geert Uytterhoeven
2020-11-16 9:47 ` Geert Uytterhoeven
2020-11-16 12:50 ` Thomas Gleixner
2020-11-16 12:50 ` Thomas Gleixner
2020-11-16 12:50 ` Lu Baolu
2020-11-16 12:50 ` Lu Baolu
2020-11-16 23:22 ` Jason Gunthorpe
2020-11-16 23:22 ` Jason Gunthorpe
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