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From: Luca Ceresoli <luca@lucaceresoli.net>
To: linux-fpga@vger.kernel.org
Cc: Luca Ceresoli <luca@lucaceresoli.net>,
	Moritz Fischer <mdf@kernel.org>, Tom Rix <trix@redhat.com>,
	Michal Simek <michal.simek@xilinx.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Anatolij Gustschin <agust@denx.de>
Subject: [PATCH v2 5/5] fpga manager: xilinx-spi: provide better diagnostics on programming failure
Date: Thu, 27 Aug 2020 16:32:49 +0200	[thread overview]
Message-ID: <20200827143249.10973-5-luca@lucaceresoli.net> (raw)
In-Reply-To: <20200827143249.10973-1-luca@lucaceresoli.net>

When the DONE pin does not go high after programming to confirm programming
success, the INIT_B pin provides some info on the reason. Use it if
available to provide a more explanatory error message.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>

---

Changes in v2:
 - also check for gpiod_get_value() errors (Tom Rix)
---
 drivers/fpga/xilinx-spi.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c
index bcc740ec42f5..ea0351be8eee 100644
--- a/drivers/fpga/xilinx-spi.c
+++ b/drivers/fpga/xilinx-spi.c
@@ -188,7 +188,21 @@ static int xilinx_spi_write_complete(struct fpga_manager *mgr,
 			return ret;
 	}
 
-	dev_err(&mgr->dev, "Timeout after config data transfer\n");
+	if (conf->init_b) {
+		ret = gpiod_get_value(conf->init_b);
+
+		if (ret < 0) {
+			dev_err(&mgr->dev, "Error reading INIT_B (%d)\n", ret);
+			return ret;
+		}
+
+		dev_err(&mgr->dev,
+			ret ? "CRC error or invalid device\n"
+			: "Missing sync word or incomplete bitstream\n");
+	} else {
+		dev_err(&mgr->dev, "Timeout after config data transfer\n");
+	}
+
 	return -ETIMEDOUT;
 }
 
-- 
2.28.0


WARNING: multiple messages have this Message-ID (diff)
From: Luca Ceresoli <luca@lucaceresoli.net>
To: linux-fpga@vger.kernel.org
Cc: Tom Rix <trix@redhat.com>, Michal Simek <michal.simek@xilinx.com>,
	linux-kernel@vger.kernel.org, Moritz Fischer <mdf@kernel.org>,
	Luca Ceresoli <luca@lucaceresoli.net>,
	Anatolij Gustschin <agust@denx.de>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 5/5] fpga manager: xilinx-spi: provide better diagnostics on programming failure
Date: Thu, 27 Aug 2020 16:32:49 +0200	[thread overview]
Message-ID: <20200827143249.10973-5-luca@lucaceresoli.net> (raw)
In-Reply-To: <20200827143249.10973-1-luca@lucaceresoli.net>

When the DONE pin does not go high after programming to confirm programming
success, the INIT_B pin provides some info on the reason. Use it if
available to provide a more explanatory error message.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>

---

Changes in v2:
 - also check for gpiod_get_value() errors (Tom Rix)
---
 drivers/fpga/xilinx-spi.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c
index bcc740ec42f5..ea0351be8eee 100644
--- a/drivers/fpga/xilinx-spi.c
+++ b/drivers/fpga/xilinx-spi.c
@@ -188,7 +188,21 @@ static int xilinx_spi_write_complete(struct fpga_manager *mgr,
 			return ret;
 	}
 
-	dev_err(&mgr->dev, "Timeout after config data transfer\n");
+	if (conf->init_b) {
+		ret = gpiod_get_value(conf->init_b);
+
+		if (ret < 0) {
+			dev_err(&mgr->dev, "Error reading INIT_B (%d)\n", ret);
+			return ret;
+		}
+
+		dev_err(&mgr->dev,
+			ret ? "CRC error or invalid device\n"
+			: "Missing sync word or incomplete bitstream\n");
+	} else {
+		dev_err(&mgr->dev, "Timeout after config data transfer\n");
+	}
+
 	return -ETIMEDOUT;
 }
 
-- 
2.28.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-08-27 14:36 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-27 14:32 [PATCH v2 1/5] fpga manager: xilinx-spi: remove stray comment Luca Ceresoli
2020-08-27 14:32 ` Luca Ceresoli
2020-08-27 14:32 ` [PATCH v2 2/5] fpga manager: xilinx-spi: remove final dot from dev_err() strings Luca Ceresoli
2020-08-27 14:32   ` Luca Ceresoli
2020-08-27 14:32 ` [PATCH v2 3/5] fpga manager: xilinx-spi: rework write_complete loop implementation Luca Ceresoli
2020-08-27 14:32   ` Luca Ceresoli
2020-08-27 18:59   ` Tom Rix
2020-08-27 18:59     ` Tom Rix
2020-08-27 19:26     ` Luca Ceresoli
2020-08-27 19:26       ` Luca Ceresoli
     [not found]       ` <27bbb896-fedf-6a3a-7220-5c57239a3b87@redhat.com>
2020-08-28  6:38         ` Luca Ceresoli
2020-08-28  6:38           ` Luca Ceresoli
2020-08-28 12:34           ` Tom Rix
2020-08-28 12:34             ` Tom Rix
2020-08-27 14:32 ` [PATCH v2 4/5] fpga manager: xilinx-spi: add error checking after gpiod_get_value() Luca Ceresoli
2020-08-27 14:32   ` Luca Ceresoli
2020-08-27 19:04   ` Tom Rix
2020-08-27 19:04     ` Tom Rix
2020-08-27 14:32 ` Luca Ceresoli [this message]
2020-08-27 14:32   ` [PATCH v2 5/5] fpga manager: xilinx-spi: provide better diagnostics on programming failure Luca Ceresoli
2020-08-27 19:09   ` Tom Rix
2020-08-27 19:09     ` Tom Rix

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