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From: Andre Przywara <andre.przywara@arm.com>
To: soc@kernel.org
Cc: Rob Herring <robh@kernel.org>,
	devicetree@vger.kernel.org, Wei Xu <xuwei5@hisilicon.com>,
	Chanho Min <chanho.min@lge.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v3 4/6] arm64: dts: hisilicon: Fix SP805 clocks
Date: Mon,  7 Sep 2020 13:18:29 +0100	[thread overview]
Message-ID: <20200907121831.242281-5-andre.przywara@arm.com> (raw)
In-Reply-To: <20200907121831.242281-1-andre.przywara@arm.com>

The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 10 ++++++----
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi |  5 +++--
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index d25aac5e0bf8..994140fbc916 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1089,16 +1089,18 @@
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xe8a06000 0x0 0x1000>;
 			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&crg_ctrl HI3660_OSC32K>;
-			clock-names = "apb_pclk";
+			clocks = <&crg_ctrl HI3660_OSC32K>,
+				 <&crg_ctrl HI3660_OSC32K>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		watchdog1: watchdog@e8a07000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xe8a07000 0x0 0x1000>;
 			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&crg_ctrl HI3660_OSC32K>;
-			clock-names = "apb_pclk";
+			clocks = <&crg_ctrl HI3660_OSC32K>,
+				 <&crg_ctrl HI3660_OSC32K>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		tsensor: tsensor@fff30000 {
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3d189d9f0d24..6578f8191d71 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -843,8 +843,9 @@
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xf8005000 0x0 0x1000>;
 			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ao_ctrl HI6220_WDT0_PCLK>;
-			clock-names = "apb_pclk";
+			clocks = <&ao_ctrl HI6220_WDT0_PCLK>,
+				 <&ao_ctrl HI6220_WDT0_PCLK>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		tsensor: tsensor@0,f7030700 {
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: soc@kernel.org
Cc: Rob Herring <robh@kernel.org>,
	devicetree@vger.kernel.org, Chanho Min <chanho.min@lge.com>,
	linux-kernel@vger.kernel.org, Wei Xu <xuwei5@hisilicon.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 4/6] arm64: dts: hisilicon: Fix SP805 clocks
Date: Mon,  7 Sep 2020 13:18:29 +0100	[thread overview]
Message-ID: <20200907121831.242281-5-andre.przywara@arm.com> (raw)
In-Reply-To: <20200907121831.242281-1-andre.przywara@arm.com>

The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 10 ++++++----
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi |  5 +++--
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index d25aac5e0bf8..994140fbc916 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1089,16 +1089,18 @@
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xe8a06000 0x0 0x1000>;
 			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&crg_ctrl HI3660_OSC32K>;
-			clock-names = "apb_pclk";
+			clocks = <&crg_ctrl HI3660_OSC32K>,
+				 <&crg_ctrl HI3660_OSC32K>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		watchdog1: watchdog@e8a07000 {
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xe8a07000 0x0 0x1000>;
 			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&crg_ctrl HI3660_OSC32K>;
-			clock-names = "apb_pclk";
+			clocks = <&crg_ctrl HI3660_OSC32K>,
+				 <&crg_ctrl HI3660_OSC32K>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		tsensor: tsensor@fff30000 {
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3d189d9f0d24..6578f8191d71 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -843,8 +843,9 @@
 			compatible = "arm,sp805-wdt", "arm,primecell";
 			reg = <0x0 0xf8005000 0x0 0x1000>;
 			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ao_ctrl HI6220_WDT0_PCLK>;
-			clock-names = "apb_pclk";
+			clocks = <&ao_ctrl HI6220_WDT0_PCLK>,
+				 <&ao_ctrl HI6220_WDT0_PCLK>;
+			clock-names = "wdog_clk", "apb_pclk";
 		};
 
 		tsensor: tsensor@0,f7030700 {
-- 
2.17.1


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  parent reply	other threads:[~2020-09-07 12:21 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-07 12:18 [PATCH v3 0/6] ARM/arm64: dts: Fix SP804/SP805 users Andre Przywara
2020-09-07 12:18 ` Andre Przywara
2020-09-07 12:18 ` [PATCH v3 1/6] ARM: dts: hisilicon: Fix SP804 users Andre Przywara
2020-09-07 12:18   ` Andre Przywara
2020-09-16  1:44   ` Wei Xu
2020-09-16  1:44     ` Wei Xu
2020-09-07 12:18 ` [PATCH v3 2/6] ARM: dts: nspire: " Andre Przywara
2020-09-07 12:18   ` Andre Przywara
2020-09-07 12:18 ` [PATCH v3 3/6] arm64: dts: lg: " Andre Przywara
2020-09-07 12:18   ` Andre Przywara
2020-09-07 12:18 ` Andre Przywara [this message]
2020-09-07 12:18   ` [PATCH v3 4/6] arm64: dts: hisilicon: Fix SP805 clocks Andre Przywara
2020-09-16  1:45   ` Wei Xu
2020-09-16  1:45     ` Wei Xu
2020-09-07 12:18 ` [PATCH v3 5/6] arm64: dts: lg: " Andre Przywara
2020-09-07 12:18   ` Andre Przywara
2020-09-07 12:18 ` [PATCH v3 6/6] ARM: dts: hisilicon: " Andre Przywara
2020-09-07 12:18   ` Andre Przywara
2020-09-16  1:42   ` Wei Xu
2020-09-16  1:42     ` Wei Xu
2020-10-03 19:57 ` [PATCH v3 0/6] ARM/arm64: dts: Fix SP804/SP805 users Olof Johansson
2020-10-03 19:57   ` Olof Johansson

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