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From: John.C.Harrison@Intel.com
To: Intel-GFX@Lists.FreeDesktop.Org
Subject: [Intel-gfx] [PATCH 07/12] drm/i915/guc: Setup doorbells data in ADS
Date: Wed, 16 Sep 2020 10:16:48 -0700	[thread overview]
Message-ID: <20200916171653.2021483-8-John.C.Harrison@Intel.com> (raw)
In-Reply-To: <20200916171653.2021483-1-John.C.Harrison@Intel.com>

From: Michal Wajdeczko <michal.wajdeczko@intel.com>

While i915 does not use GuC doorbells, the firmware requires that some
initialisation is done.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c  | 9 +++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 2 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h  | 5 +++++
 3 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index b2f05139de05..75fcce64fc57 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -119,6 +119,7 @@ static void guc_mapping_table_init(struct intel_gt *gt,
 static void __guc_ads_init(struct intel_guc *guc)
 {
 	struct intel_gt *gt = guc_to_gt(guc);
+	struct drm_i915_private *i915 = gt->i915;
 	struct __guc_ads_blob *blob = guc->ads_blob;
 	const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE;
 	u32 base;
@@ -158,6 +159,14 @@ static void __guc_ads_init(struct intel_guc *guc)
 	blob->system_info.vebox_enable_mask = VEBOX_MASK(gt);
 	blob->system_info.vdbox_sfc_support_mask = gt->info.vdbox_sfc_access;
 
+	if (INTEL_GEN(i915) >= 12 && !IS_DGFX(i915)) {
+		u32 distdbreg = intel_uncore_read(gt->uncore,
+						  GEN12_DIST_DBS_POPULATED);
+		blob->system_info.num_of_doorbells_per_sqidi =
+			((distdbreg >> GEN12_DOORBELLS_PER_SQIDI_SHIFT) &
+			 GEN12_DOORBELLS_PER_SQIDI) + 1;
+	}
+
 	guc_mapping_table_init(guc_to_gt(guc), &blob->system_info);
 
 	base = intel_guc_ggtt_offset(guc, guc->ads_vma);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index 0cd4a7f7f4cb..3492fb0d5dec 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -383,7 +383,7 @@ struct guc_gt_system_info {
 	u32 vdbox_enable_mask;
 	u32 vdbox_sfc_support_mask;
 	u32 vebox_enable_mask;
-	u32 reserved1;
+	u32 num_of_doorbells_per_sqidi;
 	u8 mapping_table[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
 	u32 reserved2[8];
 } __packed;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
index 1949346e714e..b37fc2ffaef2 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
@@ -118,6 +118,11 @@ struct guc_doorbell_info {
 #define   GEN8_DRB_VALID		  (1<<0)
 #define GEN8_DRBREGU(x)			_MMIO(0x1000 + (x) * 8 + 4)
 
+#define GEN12_DIST_DBS_POPULATED		_MMIO(0xd08)
+#define   GEN12_DOORBELLS_PER_SQIDI_SHIFT	16
+#define   GEN12_DOORBELLS_PER_SQIDI		(0xff)
+#define   GEN12_SQIDIS_DOORBELL_EXIST		(0xffff)
+
 #define DE_GUCRMR			_MMIO(0x44054)
 
 #define GUC_BCS_RCS_IER			_MMIO(0xC550)
-- 
2.25.1

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  parent reply	other threads:[~2020-09-16 17:17 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-16 17:16 [Intel-gfx] [PATCH 00/12] drm/i915/guc: Update to GuC v49 John.C.Harrison
2020-09-16 17:16 ` [Intel-gfx] [PATCH 01/12] drm/i915/guc: New GuC IDs based on engine class and instance John.C.Harrison
2020-09-16 17:16 ` [Intel-gfx] [PATCH 02/12] drm/i915/guc: Support logical engine mapping table in ADS John.C.Harrison
2020-09-16 23:27   ` Daniele Ceraolo Spurio
2020-09-17  1:19     ` John Harrison
2020-09-16 17:16 ` [Intel-gfx] [PATCH 03/12] drm/i915/guc: Setup private_data pointer in GuC ADS John.C.Harrison
2020-09-16 23:30   ` Daniele Ceraolo Spurio
2020-09-16 17:16 ` [Intel-gfx] [PATCH 04/12] drm/i915/guc: Remove GUC_CTL_CTXINFO init param John.C.Harrison
2020-09-16 23:32   ` Daniele Ceraolo Spurio
2020-09-16 17:16 ` [Intel-gfx] [PATCH 05/12] drm/i915/guc: Kill guc_ads.reg_state_buffer John.C.Harrison
2020-09-16 23:46   ` Daniele Ceraolo Spurio
2020-09-16 17:16 ` [Intel-gfx] [PATCH 06/12] drm/i915/guc: ADS changes for GuC v42 John.C.Harrison
2020-09-16 17:16 ` John.C.Harrison [this message]
2020-09-16 17:16 ` [Intel-gfx] [PATCH 08/12] drm/i915/guc: Increased engine classes in ADS John.C.Harrison
2020-09-16 17:16 ` [Intel-gfx] [PATCH 09/12] drm/i915/guc: Update firmware to v49.0.1 John.C.Harrison
2020-09-16 17:16 ` [Intel-gfx] [PATCH 10/12] drm/i915/guc: Improved reporting when GuC fails to load John.C.Harrison
2020-09-16 17:16 ` [Intel-gfx] [PATCH 11/12] drm/i915/guc: Clear pointers on free John.C.Harrison
2020-09-16 17:16 ` [Intel-gfx] [PATCH 12/12] drm/i915/uc: turn on GuC/HuC auto mode by default John.C.Harrison
2020-09-16 18:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Update to GuC v49 Patchwork
2020-09-16 18:35 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-09-17  1:22   ` John Harrison
2020-09-17  6:35     ` Saarinen, Jani
2020-09-17  6:48     ` Petri Latvala
2020-09-21 19:22       ` John Harrison
2020-09-21 20:36         ` Daniele Ceraolo Spurio
2020-09-21 21:21           ` John Harrison
2020-09-16 23:21 ` [Intel-gfx] [PATCH 00/12] " Daniele Ceraolo Spurio

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