From: Zhen Lei <thunder.leizhen@huawei.com> To: Wei Xu <xuwei5@hisilicon.com>, Rob Herring <robh+dt@kernel.org>, "Jonathan Cameron" <Jonathan.Cameron@Huawei.com>, devicetree <devicetree@vger.kernel.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, linux-kernel <linux-kernel@vger.kernel.org> Cc: Zhen Lei <thunder.leizhen@huawei.com>, Libin <huawei.libin@huawei.com>, Kefeng Wang <wangkefeng.wang@huawei.com> Subject: [PATCH v5 02/17] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers Date: Tue, 29 Sep 2020 22:14:39 +0800 [thread overview] Message-ID: <20200929141454.2312-3-thunder.leizhen@huawei.com> (raw) In-Reply-To: <20200929141454.2312-1-thunder.leizhen@huawei.com> The compatible strings of Hi6220 SRAM controller, HiP05/HiP06 PCIe-SAS subsystem controller, HiP05/HiP06 PERI subsystem controller and HiP05/HiP06 DSA subsystem controller is in syscon.yaml now. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> --- .../bindings/arm/hisilicon/hisilicon.txt | 68 ---------------------- 1 file changed, 68 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index a97f643e7d1c760..54f423d87a80a6a 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -186,24 +186,6 @@ Example: #clock-cells = <1>; }; - -Hisilicon Hi6220 SRAM controller - -Required properties: -- compatible : "hisilicon,hi6220-sramctrl", "syscon" -- reg : Register address and size - -Hisilicon's SoCs use sram for multiple purpose; on Hi6220 there have several -SRAM banks for power management, modem, security, etc. Further, use "syscon" -managing the common sram which can be shared by multiple modules. - -Example: - /*for Hi6220*/ - sram: sram@fff80000 { - compatible = "hisilicon,hi6220-sramctrl", "syscon"; - reg = <0x0 0xfff80000 0x0 0x12000>; - }; - ----------------------------------------------------------------------- Hisilicon HiP01 system controller @@ -226,56 +208,6 @@ Example: }; ----------------------------------------------------------------------- -Hisilicon HiP05/HiP06 PCIe-SAS sub system controller - -Required properties: -- compatible : "hisilicon,pcie-sas-subctrl", "syscon"; -- reg : Register address and size - -The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 PCIe-SAS sub system */ - pcie_sas: system_controller@b0000000 { - compatible = "hisilicon,pcie-sas-subctrl", "syscon"; - reg = <0xb0000000 0x10000>; - }; - -Hisilicon HiP05/HiP06 PERI sub system controller - -Required properties: -- compatible : "hisilicon,peri-subctrl", "syscon"; -- reg : Register address and size - -The PERI sub system controller is shared by peripheral controllers in -HiP05 or HiP06 Soc to implement some basic configurations. The peripheral -controllers include mdio, ddr, iic, uart, timer and so on. - -Example: - /* for HiP05 sub peri system */ - peri_c_subctrl: syscon@80000000 { - compatible = "hisilicon,peri-subctrl", "syscon"; - reg = <0x0 0x80000000 0x0 0x10000>; - }; - -Hisilicon HiP05/HiP06 DSA sub system controller - -Required properties: -- compatible : "hisilicon,dsa-subctrl", "syscon"; -- reg : Register address and size - -The DSA sub system controller is shared by peripheral controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 dsa sub system */ - pcie_sas: system_controller@a0000000 { - compatible = "hisilicon,dsa-subctrl", "syscon"; - reg = <0xa0000000 0x10000>; - }; - ------------------------------------------------------------------------ Hisilicon CPU controller Required properties: -- 1.8.3
WARNING: multiple messages have this Message-ID (diff)
From: Zhen Lei <thunder.leizhen@huawei.com> To: Wei Xu <xuwei5@hisilicon.com>, Rob Herring <robh+dt@kernel.org>, "Jonathan Cameron" <Jonathan.Cameron@Huawei.com>, devicetree <devicetree@vger.kernel.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, linux-kernel <linux-kernel@vger.kernel.org> Cc: Kefeng Wang <wangkefeng.wang@huawei.com>, Libin <huawei.libin@huawei.com>, Zhen Lei <thunder.leizhen@huawei.com> Subject: [PATCH v5 02/17] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers Date: Tue, 29 Sep 2020 22:14:39 +0800 [thread overview] Message-ID: <20200929141454.2312-3-thunder.leizhen@huawei.com> (raw) In-Reply-To: <20200929141454.2312-1-thunder.leizhen@huawei.com> The compatible strings of Hi6220 SRAM controller, HiP05/HiP06 PCIe-SAS subsystem controller, HiP05/HiP06 PERI subsystem controller and HiP05/HiP06 DSA subsystem controller is in syscon.yaml now. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> --- .../bindings/arm/hisilicon/hisilicon.txt | 68 ---------------------- 1 file changed, 68 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index a97f643e7d1c760..54f423d87a80a6a 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -186,24 +186,6 @@ Example: #clock-cells = <1>; }; - -Hisilicon Hi6220 SRAM controller - -Required properties: -- compatible : "hisilicon,hi6220-sramctrl", "syscon" -- reg : Register address and size - -Hisilicon's SoCs use sram for multiple purpose; on Hi6220 there have several -SRAM banks for power management, modem, security, etc. Further, use "syscon" -managing the common sram which can be shared by multiple modules. - -Example: - /*for Hi6220*/ - sram: sram@fff80000 { - compatible = "hisilicon,hi6220-sramctrl", "syscon"; - reg = <0x0 0xfff80000 0x0 0x12000>; - }; - ----------------------------------------------------------------------- Hisilicon HiP01 system controller @@ -226,56 +208,6 @@ Example: }; ----------------------------------------------------------------------- -Hisilicon HiP05/HiP06 PCIe-SAS sub system controller - -Required properties: -- compatible : "hisilicon,pcie-sas-subctrl", "syscon"; -- reg : Register address and size - -The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 PCIe-SAS sub system */ - pcie_sas: system_controller@b0000000 { - compatible = "hisilicon,pcie-sas-subctrl", "syscon"; - reg = <0xb0000000 0x10000>; - }; - -Hisilicon HiP05/HiP06 PERI sub system controller - -Required properties: -- compatible : "hisilicon,peri-subctrl", "syscon"; -- reg : Register address and size - -The PERI sub system controller is shared by peripheral controllers in -HiP05 or HiP06 Soc to implement some basic configurations. The peripheral -controllers include mdio, ddr, iic, uart, timer and so on. - -Example: - /* for HiP05 sub peri system */ - peri_c_subctrl: syscon@80000000 { - compatible = "hisilicon,peri-subctrl", "syscon"; - reg = <0x0 0x80000000 0x0 0x10000>; - }; - -Hisilicon HiP05/HiP06 DSA sub system controller - -Required properties: -- compatible : "hisilicon,dsa-subctrl", "syscon"; -- reg : Register address and size - -The DSA sub system controller is shared by peripheral controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 dsa sub system */ - pcie_sas: system_controller@a0000000 { - compatible = "hisilicon,dsa-subctrl", "syscon"; - reg = <0xa0000000 0x10000>; - }; - ------------------------------------------------------------------------ Hisilicon CPU controller Required properties: -- 1.8.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-29 14:16 UTC|newest] Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-29 14:14 [PATCH v5 00/17] add support for Hisilicon SD5203 SoC Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-29 14:14 ` [PATCH v5 01/17] dt-bindings: mfd: syscon: add some compatible strings for Hisilicon Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-29 20:24 ` Rob Herring 2020-09-29 20:24 ` Rob Herring 2020-09-29 14:14 ` Zhen Lei [this message] 2020-09-29 14:14 ` [PATCH v5 02/17] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers Zhen Lei 2020-09-29 20:24 ` Rob Herring 2020-09-29 20:24 ` Rob Herring 2020-09-29 14:14 ` [PATCH v5 03/17] dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate file Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-29 20:28 ` Rob Herring 2020-09-29 20:28 ` Rob Herring 2020-09-29 14:14 ` [PATCH v5 04/17] dt-bindings: arm: hisilicon: convert Hisilicon board/soc bindings to json-schema Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-29 14:14 ` [PATCH v5 05/17] dt-bindings: arm: hisilicon: add binding for SD5203 SoC Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-29 20:29 ` Rob Herring 2020-09-29 20:29 ` Rob Herring 2020-09-29 14:14 ` [PATCH v5 06/17] ARM: hisi: add support " Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-30 3:05 ` Wei Xu 2020-09-30 3:05 ` Wei Xu 2020-09-29 14:14 ` [PATCH v5 07/17] ARM: debug: add UART early console support for SD5203 Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-30 3:06 ` Wei Xu 2020-09-30 3:06 ` Wei Xu 2020-09-29 14:14 ` [PATCH v5 08/17] ARM: dts: add SD5203 dts Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-30 3:07 ` Wei Xu 2020-09-30 3:07 ` Wei Xu 2020-09-29 14:14 ` [PATCH v5 09/17] ARM: dts: hisilicon: fix ststem controller compatible node Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-30 3:08 ` Wei Xu 2020-09-30 3:08 ` Wei Xu 2020-09-29 14:14 ` [PATCH v5 10/17] dt-bindings: arm: hisilicon: convert system controller bindings to json-schema Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-29 20:29 ` Rob Herring 2020-09-29 20:29 ` Rob Herring 2020-09-29 14:14 ` [PATCH v5 11/17] dt-bindings: arm: hisilicon: convert hisilicon,cpuctrl " Zhen Lei 2020-09-29 14:14 ` [PATCH v5 11/17] dt-bindings: arm: hisilicon: convert hisilicon, cpuctrl " Zhen Lei 2020-09-29 20:29 ` Rob Herring 2020-09-29 20:29 ` Rob Herring 2020-09-29 14:14 ` [PATCH v5 12/17] dt-bindings: arm: hisilicon: convert hisilicon,pctrl " Zhen Lei 2020-09-29 14:14 ` [PATCH v5 12/17] dt-bindings: arm: hisilicon: convert hisilicon, pctrl " Zhen Lei 2020-09-29 20:29 ` Rob Herring 2020-09-29 20:29 ` Rob Herring 2020-09-29 14:14 ` [PATCH v5 13/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-fabric " Zhen Lei 2020-09-29 14:14 ` [PATCH v5 13/17] dt-bindings: arm: hisilicon: convert hisilicon, hip04-fabric " Zhen Lei 2020-09-29 20:30 ` Rob Herring 2020-09-29 20:30 ` Rob Herring 2020-09-29 14:14 ` [PATCH v5 14/17] dt-bindings: arm: hisilicon: convert hisilicon,hip04-bootwrapper " Zhen Lei 2020-09-29 14:14 ` [PATCH v5 14/17] dt-bindings: arm: hisilicon: convert hisilicon, hip04-bootwrapper " Zhen Lei 2020-09-29 20:30 ` Rob Herring 2020-09-29 20:30 ` Rob Herring 2020-09-29 14:14 ` [PATCH v5 15/17] dt-bindings: arm: hisilicon: convert Hi6220 domain controller " Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-30 1:38 ` Leizhen (ThunderTown) 2020-09-30 1:38 ` Leizhen (ThunderTown) 2020-09-30 2:50 ` Leizhen (ThunderTown) 2020-09-30 2:50 ` Leizhen (ThunderTown) 2020-09-29 14:14 ` [PATCH v5 16/17] dt-bindings: arm: hisilicon: convert hisilicon,hi3798cv200-perictrl " Zhen Lei 2020-09-29 14:14 ` [PATCH v5 16/17] dt-bindings: arm: hisilicon: convert hisilicon, hi3798cv200-perictrl " Zhen Lei 2020-09-29 20:30 ` Rob Herring 2020-09-29 20:30 ` Rob Herring 2020-09-29 14:14 ` [PATCH v5 17/17] dt-bindings: arm: hisilicon: convert LPC controller " Zhen Lei 2020-09-29 14:14 ` Zhen Lei 2020-09-29 20:30 ` Rob Herring 2020-09-29 20:30 ` Rob Herring
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200929141454.2312-3-thunder.leizhen@huawei.com \ --to=thunder.leizhen@huawei.com \ --cc=Jonathan.Cameron@Huawei.com \ --cc=devicetree@vger.kernel.org \ --cc=huawei.libin@huawei.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=robh+dt@kernel.org \ --cc=wangkefeng.wang@huawei.com \ --cc=xuwei5@hisilicon.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.