From: Paul Cercueil <paul@crapouillou.net> To: Christoph Hellwig <hch@lst.de> Cc: Stephen Rothwell <sfr@canb.auug.org.au>, Dave Airlie <airlied@linux.ie>, DRI <dri-devel@lists.freedesktop.org>, Linux Next Mailing List <linux-next@vger.kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Paul Cercueil <paul@crapouillou.net> Subject: [PATCH 3/3] drm/ingenic: Alloc cached GEM buffers with dma_alloc_noncoherent Date: Wed, 30 Sep 2020 19:16:44 +0200 [thread overview] Message-ID: <20200930171644.299363-3-paul@crapouillou.net> (raw) In-Reply-To: <20200930165212.GA8833@lst.de> It turns out that if you want to mmap GEM buffers fully cached, then they should be allocated as such as well. Who would have known? Introduce a custom .dumb_create callback, that will behave just like drm_gem_cma_dumb_create(), except that it will allocate the GEM buffer using dma_alloc_noncoherent() if non-coherent memory is what we want. Signed-off-by: Paul Cercueil <paul@crapouillou.net> --- drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 48 ++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c index 07a1da7266e4..8ece269c040f 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c @@ -794,6 +794,52 @@ static int ingenic_drm_gem_cma_mmap(struct file *filp, return ingenic_drm_gem_mmap(vma->vm_private_data, vma); } +static int ingenic_drm_gem_cma_dumb_create(struct drm_file *file_priv, + struct drm_device *drm, + struct drm_mode_create_dumb *args) +{ + /* + * This is basically a copy of drm_gem_cma_dumb_create, which supports + * creating fully cached GEM buffers. + */ + struct drm_gem_cma_object *cma_obj; + struct drm_gem_object *gem_obj; + size_t size; + int ret; + + args->pitch = DIV_ROUND_UP(args->width * args->bpp, 8); + args->size = args->pitch * args->height; + + size = PAGE_ALIGN(args->size); + + cma_obj = drm_gem_cma_create_noalloc(drm, size); + if (IS_ERR(cma_obj)) + return PTR_ERR(cma_obj); + + if (ingenic_drm_cached_gem_buf) { + cma_obj->vaddr = dma_alloc_noncoherent(drm->dev, size, + &cma_obj->paddr, + DMA_TO_DEVICE, + GFP_KERNEL | __GFP_NOWARN); + } else { + cma_obj->vaddr = dma_alloc_wc(drm->dev, size, &cma_obj->paddr, + GFP_KERNEL | __GFP_NOWARN); + } + if (!cma_obj->vaddr) { + dev_err(drm->dev, "Failed to allocate buffer with size %zu\n", size); + ret = -ENOMEM; + goto out_gem_object_put; + } + + gem_obj = &cma_obj->base; + + ret = drm_gem_handle_create(file_priv, gem_obj, &args->handle); + +out_gem_object_put: + drm_gem_object_put(gem_obj); + return ret; +} + static const struct file_operations ingenic_drm_fops = { .owner = THIS_MODULE, .open = drm_open, @@ -816,7 +862,7 @@ static struct drm_driver ingenic_drm_driver_data = { .patchlevel = 0, .fops = &ingenic_drm_fops, - DRM_GEM_CMA_DRIVER_OPS, + DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(ingenic_drm_gem_cma_dumb_create), .irq_handler = ingenic_drm_irq_handler, }; -- 2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Paul Cercueil <paul@crapouillou.net> To: Christoph Hellwig <hch@lst.de> Cc: Stephen Rothwell <sfr@canb.auug.org.au>, Dave Airlie <airlied@linux.ie>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, DRI <dri-devel@lists.freedesktop.org>, Paul Cercueil <paul@crapouillou.net>, Linux Next Mailing List <linux-next@vger.kernel.org> Subject: [PATCH 3/3] drm/ingenic: Alloc cached GEM buffers with dma_alloc_noncoherent Date: Wed, 30 Sep 2020 19:16:44 +0200 [thread overview] Message-ID: <20200930171644.299363-3-paul@crapouillou.net> (raw) In-Reply-To: <20200930165212.GA8833@lst.de> It turns out that if you want to mmap GEM buffers fully cached, then they should be allocated as such as well. Who would have known? Introduce a custom .dumb_create callback, that will behave just like drm_gem_cma_dumb_create(), except that it will allocate the GEM buffer using dma_alloc_noncoherent() if non-coherent memory is what we want. Signed-off-by: Paul Cercueil <paul@crapouillou.net> --- drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 48 ++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c index 07a1da7266e4..8ece269c040f 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c @@ -794,6 +794,52 @@ static int ingenic_drm_gem_cma_mmap(struct file *filp, return ingenic_drm_gem_mmap(vma->vm_private_data, vma); } +static int ingenic_drm_gem_cma_dumb_create(struct drm_file *file_priv, + struct drm_device *drm, + struct drm_mode_create_dumb *args) +{ + /* + * This is basically a copy of drm_gem_cma_dumb_create, which supports + * creating fully cached GEM buffers. + */ + struct drm_gem_cma_object *cma_obj; + struct drm_gem_object *gem_obj; + size_t size; + int ret; + + args->pitch = DIV_ROUND_UP(args->width * args->bpp, 8); + args->size = args->pitch * args->height; + + size = PAGE_ALIGN(args->size); + + cma_obj = drm_gem_cma_create_noalloc(drm, size); + if (IS_ERR(cma_obj)) + return PTR_ERR(cma_obj); + + if (ingenic_drm_cached_gem_buf) { + cma_obj->vaddr = dma_alloc_noncoherent(drm->dev, size, + &cma_obj->paddr, + DMA_TO_DEVICE, + GFP_KERNEL | __GFP_NOWARN); + } else { + cma_obj->vaddr = dma_alloc_wc(drm->dev, size, &cma_obj->paddr, + GFP_KERNEL | __GFP_NOWARN); + } + if (!cma_obj->vaddr) { + dev_err(drm->dev, "Failed to allocate buffer with size %zu\n", size); + ret = -ENOMEM; + goto out_gem_object_put; + } + + gem_obj = &cma_obj->base; + + ret = drm_gem_handle_create(file_priv, gem_obj, &args->handle); + +out_gem_object_put: + drm_gem_object_put(gem_obj); + return ret; +} + static const struct file_operations ingenic_drm_fops = { .owner = THIS_MODULE, .open = drm_open, @@ -816,7 +862,7 @@ static struct drm_driver ingenic_drm_driver_data = { .patchlevel = 0, .fops = &ingenic_drm_fops, - DRM_GEM_CMA_DRIVER_OPS, + DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(ingenic_drm_gem_cma_dumb_create), .irq_handler = ingenic_drm_irq_handler, }; -- 2.28.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-09-30 17:17 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-28 3:54 linux-next: build failure after merge of the drm tree Stephen Rothwell 2020-09-28 3:54 ` Stephen Rothwell 2020-09-28 6:04 ` Christoph Hellwig 2020-09-28 6:08 ` Dave Airlie 2020-09-28 6:08 ` Dave Airlie 2020-09-28 6:14 ` Christoph Hellwig 2020-09-28 10:15 ` Paul Cercueil 2020-09-28 10:15 ` Paul Cercueil 2020-09-28 11:34 ` Christoph Hellwig 2020-09-28 11:46 ` Paul Cercueil 2020-09-28 11:46 ` Paul Cercueil 2020-09-28 12:10 ` Christoph Hellwig 2020-09-28 13:31 ` Paul Cercueil 2020-09-28 13:31 ` Paul Cercueil 2020-09-30 9:02 ` Christoph Hellwig 2020-09-30 13:33 ` Paul Cercueil 2020-09-30 13:33 ` Paul Cercueil 2020-09-30 16:11 ` Christoph Hellwig 2020-09-30 16:39 ` Paul Cercueil 2020-09-30 16:39 ` Paul Cercueil 2020-09-30 16:40 ` Christoph Hellwig 2020-09-30 16:45 ` Paul Cercueil 2020-09-30 16:45 ` Paul Cercueil 2020-09-30 16:52 ` Christoph Hellwig 2020-09-30 17:16 ` [PATCH 1/3] drm: Add and export function drm_gem_cma_create_noalloc Paul Cercueil 2020-09-30 17:16 ` Paul Cercueil 2020-10-01 8:51 ` Daniel Vetter 2020-10-01 8:51 ` Daniel Vetter 2020-09-30 17:16 ` [PATCH 2/3] drm/ingenic: Update code to mmap GEM buffers cached Paul Cercueil 2020-09-30 17:16 ` Paul Cercueil 2020-10-01 5:32 ` Christoph Hellwig 2020-09-30 17:16 ` Paul Cercueil [this message] 2020-09-30 17:16 ` [PATCH 3/3] drm/ingenic: Alloc cached GEM buffers with dma_alloc_noncoherent Paul Cercueil 2020-10-01 5:35 ` Christoph Hellwig 2020-10-04 14:17 ` [PATCH] Revert "gpu/drm: ingenic: Add option to mmap GEM buffers cached" Paul Cercueil 2020-10-04 14:17 ` Paul Cercueil 2020-10-04 19:59 ` Sam Ravnborg 2020-10-04 19:59 ` Sam Ravnborg 2020-10-04 20:11 ` Paul Cercueil 2020-10-04 20:11 ` Paul Cercueil 2020-10-05 12:01 ` Stephen Rothwell 2020-10-05 12:01 ` Stephen Rothwell 2020-10-05 14:05 ` Daniel Vetter 2020-10-05 14:05 ` Daniel Vetter 2020-10-05 14:47 ` Paul Cercueil 2020-10-05 14:47 ` Paul Cercueil 2020-10-05 17:38 ` Daniel Vetter 2020-10-05 17:38 ` Daniel Vetter 2020-10-05 22:31 ` Daniel Vetter 2020-10-05 22:31 ` Daniel Vetter 2020-10-06 4:30 ` Stephen Rothwell 2020-10-06 4:30 ` Stephen Rothwell
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