From: Zhen Lei <thunder.leizhen@huawei.com> To: Wei Xu <xuwei5@hisilicon.com>, Rob Herring <robh+dt@kernel.org>, devicetree <devicetree@vger.kernel.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, linux-kernel <linux-kernel@vger.kernel.org> Cc: Zhen Lei <thunder.leizhen@huawei.com> Subject: [PATCH 09/11] arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml Date: Mon, 12 Oct 2020 21:17:37 +0800 [thread overview] Message-ID: <20201012131739.1655-10-thunder.leizhen@huawei.com> (raw) In-Reply-To: <20201012131739.1655-1-thunder.leizhen@huawei.com> The arm,pl022 binding need to specify two clocks: "sspclk", "apb_pclk". But only "apb_pclk" is specified now. Because the driver preferentially matches the first clock. Otherwise, it matches the second clock instead of both clocks. So both of them use the same clock don't change the function. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++---- arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 4 ++-- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 4 ++-- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 3f6b1715835af06..edb80abf45b327b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -971,8 +971,8 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>, <&crg_ctrl HI3660_CLK_GATE_SPI2>; + clock-names = "sspclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&spi2_pmx_func &spi2_cfg_func>; num-cs = <1>; @@ -986,8 +986,8 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>, <&crg_ctrl HI3660_CLK_GATE_SPI3>; + clock-names = "sspclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&spi3_pmx_func &spi3_cfg_func>; num-cs = <1>; diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi index 11a72891e2a3a65..1c7dda972c92856 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi @@ -291,8 +291,8 @@ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; num-cs = <1>; cs-gpios = <&gpio7 1 0>; - clocks = <&crg HISTB_SPI0_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HISTB_SPI0_CLK>, <&crg HISTB_SPI0_CLK>; + clock-names = "sspclk", "apb_pclk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 014735a9bc7312d..c6580c9f068ebf7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -725,8 +725,8 @@ interrupts = <0 50 4>; bus-id = <0>; enable-dma = <0>; - clocks = <&sys_ctrl HI6220_SPI_CLK>; - clock-names = "apb_pclk"; + clocks = <&sys_ctrl HI6220_SPI_CLK>, <&sys_ctrl HI6220_SPI_CLK>; + clock-names = "sspclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>; num-cs = <1>; -- 1.8.3
WARNING: multiple messages have this Message-ID (diff)
From: Zhen Lei <thunder.leizhen@huawei.com> To: Wei Xu <xuwei5@hisilicon.com>, Rob Herring <robh+dt@kernel.org>, devicetree <devicetree@vger.kernel.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, linux-kernel <linux-kernel@vger.kernel.org> Cc: Zhen Lei <thunder.leizhen@huawei.com> Subject: [PATCH 09/11] arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml Date: Mon, 12 Oct 2020 21:17:37 +0800 [thread overview] Message-ID: <20201012131739.1655-10-thunder.leizhen@huawei.com> (raw) In-Reply-To: <20201012131739.1655-1-thunder.leizhen@huawei.com> The arm,pl022 binding need to specify two clocks: "sspclk", "apb_pclk". But only "apb_pclk" is specified now. Because the driver preferentially matches the first clock. Otherwise, it matches the second clock instead of both clocks. So both of them use the same clock don't change the function. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++---- arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 4 ++-- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 4 ++-- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 3f6b1715835af06..edb80abf45b327b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -971,8 +971,8 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>, <&crg_ctrl HI3660_CLK_GATE_SPI2>; + clock-names = "sspclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&spi2_pmx_func &spi2_cfg_func>; num-cs = <1>; @@ -986,8 +986,8 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>, <&crg_ctrl HI3660_CLK_GATE_SPI3>; + clock-names = "sspclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&spi3_pmx_func &spi3_cfg_func>; num-cs = <1>; diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi index 11a72891e2a3a65..1c7dda972c92856 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi @@ -291,8 +291,8 @@ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; num-cs = <1>; cs-gpios = <&gpio7 1 0>; - clocks = <&crg HISTB_SPI0_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HISTB_SPI0_CLK>, <&crg HISTB_SPI0_CLK>; + clock-names = "sspclk", "apb_pclk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 014735a9bc7312d..c6580c9f068ebf7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -725,8 +725,8 @@ interrupts = <0 50 4>; bus-id = <0>; enable-dma = <0>; - clocks = <&sys_ctrl HI6220_SPI_CLK>; - clock-names = "apb_pclk"; + clocks = <&sys_ctrl HI6220_SPI_CLK>, <&sys_ctrl HI6220_SPI_CLK>; + clock-names = "sspclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>; num-cs = <1>; -- 1.8.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-12 13:19 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-12 13:17 [PATCH 00/11] clean up some Hisilicon-related errors detected by DT schema on arm64 Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` [PATCH 01/11] arm64: dts: hisilicon: normalize the node name of the ITS devices Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` [PATCH 02/11] arm64: dts: hisilicon: separate each group of data in the property "reg" Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` [PATCH 03/11] arm64: dts: hisilicon: write the values of property-units into a uint32 array Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` [PATCH 04/11] arm64: dts: hisilicon: remove unused property pinctrl-names Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` [PATCH 05/11] arm64: dts: hisilicon: place clock-names "biu" before "ciu" Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` [PATCH 06/11] arm64: dts: hisilicon: normalize the node name of the SMMU devices Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` [PATCH 07/11] arm64: dts: hisilicon: normalize the node name of the usb devices Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` [PATCH 08/11] arm64: dts: hisilicon: normalize the node name of the UART devices Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` Zhen Lei [this message] 2020-10-12 13:17 ` [PATCH 09/11] arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml Zhen Lei 2020-10-12 13:17 ` [PATCH 10/11] arm64: dts: hisilicon: list all clocks required by pl011.yaml Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-10-12 13:17 ` [PATCH 11/11] arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml Zhen Lei 2020-10-12 13:17 ` Zhen Lei 2020-11-25 2:21 ` [PATCH 00/11] clean up some Hisilicon-related errors detected by DT schema on arm64 Wei Xu 2020-11-25 2:21 ` Wei Xu
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