From: Biju Das <biju.das.jz@bp.renesas.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
Chris Paterson <Chris.Paterson2@renesas.com>,
Biju Das <biju.das@bp.renesas.com>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 3/6] pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1
Date: Mon, 19 Oct 2020 13:42:55 +0100 [thread overview]
Message-ID: <20201019124258.4574-4-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20201019124258.4574-1-biju.das.jz@bp.renesas.com>
This driver supports both RZ/G2N and R-Car M3-N(R8A77965) SoC's.
Optimize pinctrl image size for RZ/G2N, when R-Car M3-N(R8A77965) SoC is
disabled in the defconfig.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a77965.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c
index 7a50b9b69a7d..85fce3dae7a5 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77965.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77965.c
@@ -1847,6 +1847,7 @@ static const unsigned int canfd1_data_mux[] = {
CANFD1_TX_MARK, CANFD1_RX_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
/* - DRIF0 --------------------------------------------------------------- */
static const unsigned int drif0_ctrl_a_pins[] = {
/* CLK, SYNC */
@@ -2120,6 +2121,7 @@ static const unsigned int drif3_data1_b_pins[] = {
static const unsigned int drif3_data1_b_mux[] = {
RIF3_D1_B_MARK,
};
+#endif
/* - DU --------------------------------------------------------------------- */
static const unsigned int du_rgb666_pins[] = {
@@ -4380,7 +4382,9 @@ static const unsigned int vin5_clk_mux[] = {
static const struct {
struct sh_pfc_pin_group common[318];
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
struct sh_pfc_pin_group automotive[30];
+#endif
} pinmux_groups = {
.common = {
SH_PFC_PIN_GROUP(audio_clk_a_a),
@@ -4702,6 +4706,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin5_clkenb),
SH_PFC_PIN_GROUP(vin5_clk),
},
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
.automotive = {
SH_PFC_PIN_GROUP(drif0_ctrl_a),
SH_PFC_PIN_GROUP(drif0_data0_a),
@@ -4734,6 +4739,7 @@ static const struct {
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
}
+#endif
};
static const char * const audio_clk_groups[] = {
@@ -4792,6 +4798,7 @@ static const char * const canfd1_groups[] = {
"canfd1_data",
};
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
static const char * const drif0_groups[] = {
"drif0_ctrl_a",
"drif0_data0_a",
@@ -4833,6 +4840,7 @@ static const char * const drif3_groups[] = {
"drif3_data0_b",
"drif3_data1_b",
};
+#endif
static const char * const du_groups[] = {
"du_rgb666",
@@ -5250,7 +5258,9 @@ static const char * const vin5_groups[] = {
static const struct {
struct sh_pfc_function common[51];
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
struct sh_pfc_function automotive[4];
+#endif
} pinmux_functions = {
.common = {
SH_PFC_FUNCTION(audio_clk),
@@ -5305,12 +5315,14 @@ static const struct {
SH_PFC_FUNCTION(vin4),
SH_PFC_FUNCTION(vin5),
},
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
.automotive = {
SH_PFC_FUNCTION(drif0),
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
}
+#endif
};
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
--
2.17.1
next prev parent reply other threads:[~2020-10-19 12:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-19 12:42 [PATCH 0/6] Optimize pinctrl image size for RZ/G SoC's Biju Das
2020-10-19 12:42 ` [PATCH 1/6] pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1 Biju Das
2020-10-22 12:00 ` Geert Uytterhoeven
2020-10-22 12:37 ` Biju Das
2020-10-19 12:42 ` [PATCH 2/6] pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1 Biju Das
2020-10-19 12:51 ` Biju Das
2020-10-19 12:42 ` Biju Das [this message]
2020-10-22 12:03 ` [PATCH 3/6] pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1 Geert Uytterhoeven
2020-10-19 12:42 ` [PATCH 4/6] pinctrl: renesas: r8a77990: Optimize pinctrl image size for R8A774C0 Biju Das
2020-10-22 12:04 ` Geert Uytterhoeven
2020-10-22 12:05 ` Geert Uytterhoeven
2020-10-22 12:39 ` Biju Das
2020-10-19 12:42 ` [PATCH 5/6] pinctrl: renesas: r8a7790: Optimize pinctrl image size for R8A7742 Biju Das
2020-10-22 12:05 ` Geert Uytterhoeven
2020-10-19 12:42 ` [PATCH 6/6] pinctrl: renesas: r8a7791: Optimize pinctrl image size for R8A774[3|4] Biju Das
2020-10-22 12:07 ` Geert Uytterhoeven
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201019124258.4574-4-biju.das.jz@bp.renesas.com \
--to=biju.das.jz@bp.renesas.com \
--cc=Chris.Paterson2@renesas.com \
--cc=biju.das@bp.renesas.com \
--cc=geert+renesas@glider.be \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.