All of lore.kernel.org
 help / color / mirror / Atom feed
From: Fabien Parent <fparent@baylibre.com>
To: linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org
Cc: matthias.bgg@gmail.com, robh+dt@kernel.org, daniel@ffwll.ch,
	airlied@linux.ie, p.zabel@pengutronix.de,
	chunkuang.hu@kernel.org, Fabien Parent <fparent@baylibre.com>
Subject: [PATCH 4/8] drm/mediatek: dsi: add pdata variable to start clk in HS mode
Date: Tue, 20 Oct 2020 19:42:49 +0200	[thread overview]
Message-ID: <20201020174253.3757771-5-fparent@baylibre.com> (raw)
In-Reply-To: <20201020174253.3757771-1-fparent@baylibre.com>

On MT8167, DSI seems to work fine only if we start the clk in HS mode.
If we don't start the clk in HS but try to switch later to HS, the
display does not work.

This commit adds a platform data variable to be used to start the
DSI clk in HS mode at power on.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 4a188a942c38..461643c05689 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -175,6 +175,7 @@ struct mtk_dsi_driver_data {
 	const u32 reg_cmdq_off;
 	bool has_shadow_ctl;
 	bool has_size_ctl;
+	bool use_hs_on_power_on;
 };
 
 struct mtk_dsi {
@@ -671,7 +672,7 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
 
 	mtk_dsi_clk_ulp_mode_leave(dsi);
 	mtk_dsi_lane0_ulp_mode_leave(dsi);
-	mtk_dsi_clk_hs_mode(dsi, 0);
+	mtk_dsi_clk_hs_mode(dsi, !!dsi->driver_data->use_hs_on_power_on);
 
 	return 0;
 err_disable_engine_clk:
-- 
2.28.0


WARNING: multiple messages have this Message-ID (diff)
From: Fabien Parent <fparent@baylibre.com>
To: linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org
Cc: chunkuang.hu@kernel.org, daniel@ffwll.ch, airlied@linux.ie,
	Fabien Parent <fparent@baylibre.com>,
	robh+dt@kernel.org, p.zabel@pengutronix.de,
	matthias.bgg@gmail.com
Subject: [PATCH 4/8] drm/mediatek: dsi: add pdata variable to start clk in HS mode
Date: Tue, 20 Oct 2020 19:42:49 +0200	[thread overview]
Message-ID: <20201020174253.3757771-5-fparent@baylibre.com> (raw)
In-Reply-To: <20201020174253.3757771-1-fparent@baylibre.com>

On MT8167, DSI seems to work fine only if we start the clk in HS mode.
If we don't start the clk in HS but try to switch later to HS, the
display does not work.

This commit adds a platform data variable to be used to start the
DSI clk in HS mode at power on.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 4a188a942c38..461643c05689 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -175,6 +175,7 @@ struct mtk_dsi_driver_data {
 	const u32 reg_cmdq_off;
 	bool has_shadow_ctl;
 	bool has_size_ctl;
+	bool use_hs_on_power_on;
 };
 
 struct mtk_dsi {
@@ -671,7 +672,7 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
 
 	mtk_dsi_clk_ulp_mode_leave(dsi);
 	mtk_dsi_lane0_ulp_mode_leave(dsi);
-	mtk_dsi_clk_hs_mode(dsi, 0);
+	mtk_dsi_clk_hs_mode(dsi, !!dsi->driver_data->use_hs_on_power_on);
 
 	return 0;
 err_disable_engine_clk:
-- 
2.28.0


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Fabien Parent <fparent@baylibre.com>
To: linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org
Cc: chunkuang.hu@kernel.org, daniel@ffwll.ch, airlied@linux.ie,
	Fabien Parent <fparent@baylibre.com>,
	robh+dt@kernel.org, p.zabel@pengutronix.de,
	matthias.bgg@gmail.com
Subject: [PATCH 4/8] drm/mediatek: dsi: add pdata variable to start clk in HS mode
Date: Tue, 20 Oct 2020 19:42:49 +0200	[thread overview]
Message-ID: <20201020174253.3757771-5-fparent@baylibre.com> (raw)
In-Reply-To: <20201020174253.3757771-1-fparent@baylibre.com>

On MT8167, DSI seems to work fine only if we start the clk in HS mode.
If we don't start the clk in HS but try to switch later to HS, the
display does not work.

This commit adds a platform data variable to be used to start the
DSI clk in HS mode at power on.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 4a188a942c38..461643c05689 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -175,6 +175,7 @@ struct mtk_dsi_driver_data {
 	const u32 reg_cmdq_off;
 	bool has_shadow_ctl;
 	bool has_size_ctl;
+	bool use_hs_on_power_on;
 };
 
 struct mtk_dsi {
@@ -671,7 +672,7 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
 
 	mtk_dsi_clk_ulp_mode_leave(dsi);
 	mtk_dsi_lane0_ulp_mode_leave(dsi);
-	mtk_dsi_clk_hs_mode(dsi, 0);
+	mtk_dsi_clk_hs_mode(dsi, !!dsi->driver_data->use_hs_on_power_on);
 
 	return 0;
 err_disable_engine_clk:
-- 
2.28.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Fabien Parent <fparent@baylibre.com>
To: linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org
Cc: chunkuang.hu@kernel.org, airlied@linux.ie,
	Fabien Parent <fparent@baylibre.com>,
	robh+dt@kernel.org, matthias.bgg@gmail.com
Subject: [PATCH 4/8] drm/mediatek: dsi: add pdata variable to start clk in HS mode
Date: Tue, 20 Oct 2020 19:42:49 +0200	[thread overview]
Message-ID: <20201020174253.3757771-5-fparent@baylibre.com> (raw)
In-Reply-To: <20201020174253.3757771-1-fparent@baylibre.com>

On MT8167, DSI seems to work fine only if we start the clk in HS mode.
If we don't start the clk in HS but try to switch later to HS, the
display does not work.

This commit adds a platform data variable to be used to start the
DSI clk in HS mode at power on.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 4a188a942c38..461643c05689 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -175,6 +175,7 @@ struct mtk_dsi_driver_data {
 	const u32 reg_cmdq_off;
 	bool has_shadow_ctl;
 	bool has_size_ctl;
+	bool use_hs_on_power_on;
 };
 
 struct mtk_dsi {
@@ -671,7 +672,7 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
 
 	mtk_dsi_clk_ulp_mode_leave(dsi);
 	mtk_dsi_lane0_ulp_mode_leave(dsi);
-	mtk_dsi_clk_hs_mode(dsi, 0);
+	mtk_dsi_clk_hs_mode(dsi, !!dsi->driver_data->use_hs_on_power_on);
 
 	return 0;
 err_disable_engine_clk:
-- 
2.28.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2020-10-20 17:43 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-20 17:42 [PATCH 0/8] Add DRM/DSI support for MT8167 SoC Fabien Parent
2020-10-20 17:42 ` Fabien Parent
2020-10-20 17:42 ` Fabien Parent
2020-10-20 17:42 ` Fabien Parent
2020-10-20 17:42 ` [PATCH 1/8] dt-bindings: display: mediatek: disp: add documentation " Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-21 23:40   ` Chun-Kuang Hu
2020-10-21 23:40     ` Chun-Kuang Hu
2020-10-21 23:40     ` Chun-Kuang Hu
2020-10-21 23:40     ` Chun-Kuang Hu
2020-10-20 17:42 ` [PATCH 2/8] dt-bindings: display: mediatek: dsi: " Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-21 17:01   ` Chun-Kuang Hu
2020-10-21 17:01     ` Chun-Kuang Hu
2020-10-21 17:01     ` Chun-Kuang Hu
2020-10-21 17:01     ` Chun-Kuang Hu
2020-10-21 18:56     ` Fabien Parent
2020-10-21 18:56       ` Fabien Parent
2020-10-21 18:56       ` Fabien Parent
2020-10-21 18:56       ` Fabien Parent
2020-10-20 17:42 ` [PATCH 3/8] drm/mediatek: add disp-color MT8167 support Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-21 23:42   ` Chun-Kuang Hu
2020-10-21 23:42     ` Chun-Kuang Hu
2020-10-21 23:42     ` Chun-Kuang Hu
2020-10-21 23:42     ` Chun-Kuang Hu
2020-10-20 17:42 ` Fabien Parent [this message]
2020-10-20 17:42   ` [PATCH 4/8] drm/mediatek: dsi: add pdata variable to start clk in HS mode Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-21 17:07   ` Chun-Kuang Hu
2020-10-21 17:07     ` Chun-Kuang Hu
2020-10-21 17:07     ` Chun-Kuang Hu
2020-10-21 17:07     ` Chun-Kuang Hu
2020-10-22 16:48     ` Fabien Parent
2020-10-22 16:48       ` Fabien Parent
2020-10-22 16:48       ` Fabien Parent
2020-10-22 16:48       ` Fabien Parent
2020-10-20 17:42 ` [PATCH 5/8] drm/mediatek: dsi: add support for mipi26m clk Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42 ` [PATCH 6/8] drm/mediatek: dsi: add support for MT8167 SoC Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42 ` [PATCH 7/8] drm/mediatek: add DDP support for MT8167 Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-21 23:56   ` Chun-Kuang Hu
2020-10-21 23:56     ` Chun-Kuang Hu
2020-10-21 23:56     ` Chun-Kuang Hu
2020-10-21 23:56     ` Chun-Kuang Hu
2020-10-20 17:42 ` [PATCH 8/8] drm/mediatek: Add support for main DDP path on MT8167 Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent
2020-10-20 17:42   ` Fabien Parent

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201020174253.3757771-5-fparent@baylibre.com \
    --to=fparent@baylibre.com \
    --cc=airlied@linux.ie \
    --cc=chunkuang.hu@kernel.org \
    --cc=daniel@ffwll.ch \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=p.zabel@pengutronix.de \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.