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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Alexander Bulekov" <alxndr@bu.edu>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 04/13] hw/sd/sdhci: Stop multiple transfers when block count is cleared
Date: Wed, 21 Oct 2020 19:34:41 +0200	[thread overview]
Message-ID: <20201021173450.2616910-5-f4bug@amsat.org> (raw)
In-Reply-To: <20201021173450.2616910-1-f4bug@amsat.org>

Clearing BlockCount stops multiple transfers.

See "SD Host Controller Simplified Specification Version 2.00":

- 2.2.3. Block Count Register (Offset 006h)
- Table 2-8 : Determination of Transfer Type

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Alexander Bulekov <alxndr@bu.edu>
Message-Id: <20200903172806.489710-2-f4bug@amsat.org>
---
 hw/sd/sdhci.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index c849c3d99b8..61e469bd32f 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -731,6 +731,12 @@ static void sdhci_do_adma(SDHCIState *s)
     ADMADescr dscr = {};
     int i;
 
+    if (s->trnmod & SDHC_TRNS_BLK_CNT_EN && !s->blkcnt) {
+        /* Stop Multiple Transfer */
+        sdhci_end_transfer(s);
+        return;
+    }
+
     for (i = 0; i < SDHC_ADMA_DESCS_PER_DELAY; ++i) {
         s->admaerr &= ~SDHC_ADMAERR_LENGTH_MISMATCH;
 
@@ -756,7 +762,6 @@ static void sdhci_do_adma(SDHCIState *s)
 
         switch (dscr.attr & SDHC_ADMA_ATTR_ACT_MASK) {
         case SDHC_ADMA_ATTR_ACT_TRAN:  /* data transfer */
-
             if (s->trnmod & SDHC_TRNS_READ) {
                 while (length) {
                     if (s->data_count == 0) {
-- 
2.26.2



  parent reply	other threads:[~2020-10-21 17:42 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-21 17:34 [PULL 00/13] SD/MMC patches for 2020-10-21 Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 01/13] hw/sd/sdhci: Fix qemu_log_mask() format string Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 02/13] hw/sd/sdhci: Document the datasheet used Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 03/13] hw/sd/sdhci: Fix DMA Transfer Block Size field Philippe Mathieu-Daudé
2020-10-21 17:34 ` Philippe Mathieu-Daudé [this message]
2020-10-21 17:34 ` [PULL 05/13] hw/sd/sdhci: Resume pending DMA transfers on MMIO accesses Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 06/13] hw/sd/sdhci: Let sdhci_update_irq() return if IRQ was delivered Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 07/13] hw/sd/sdhci: Yield if interrupt delivered during multiple transfer Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 08/13] hw/sd/sdcard: Add trace event for ERASE command (CMD38) Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 09/13] hw/sd/sdcard: Introduce the INVALID_ADDRESS definition Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 10/13] hw/sd/sdcard: Do not use legal address '0' for INVALID_ADDRESS Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 11/13] hw/sd/sdcard: Reset both start/end addresses on error Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 12/13] hw/sd/sdcard: Do not attempt to erase out of range addresses Philippe Mathieu-Daudé
2020-10-21 17:34 ` [PULL 13/13] hw/sd/sdcard: Assert if accessing an illegal group Philippe Mathieu-Daudé
2020-10-22 11:33 ` [PULL 00/13] SD/MMC patches for 2020-10-21 Peter Maydell

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