From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: linux-kernel@vger.kernel.org
Cc: matthias.bgg@gmail.com, drinkcat@chromium.org,
hsinyi@chromium.org, Collabora Kernel ML <kernel@collabora.com>,
fparent@baylibre.com, weiyi.lu@mediatek.com,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: [PATCH v3 14/16] dt-bindings: power: Add MT8192 power domains
Date: Mon, 26 Oct 2020 18:55:23 +0100 [thread overview]
Message-ID: <20201026175526.2915399-15-enric.balletbo@collabora.com> (raw)
In-Reply-To: <20201026175526.2915399-1-enric.balletbo@collabora.com>
From: Weiyi Lu <weiyi.lu@mediatek.com>
Add power domains dt-bindings for MT8192.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes in v3: None
Changes in v2: None
.../power/mediatek,power-controller.yaml | 2 ++
include/dt-bindings/power/mt8192-power.h | 32 +++++++++++++++++++
2 files changed, 34 insertions(+)
create mode 100644 include/dt-bindings/power/mt8192-power.h
diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index 7126c3c81570..0318ffb1133c 100644
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -25,6 +25,7 @@ properties:
enum:
- mediatek,mt8173-power-controller
- mediatek,mt8183-power-controller
+ - mediatek,mt8192-power-controller
'#power-domain-cells':
const: 1
@@ -60,6 +61,7 @@ patternProperties:
Power domain index. Valid values are defined in:
"include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.
"include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
+ "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
maxItems: 1
clocks:
diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h
new file mode 100644
index 000000000000..4eaa53d7270a
--- /dev/null
+++ b/include/dt-bindings/power/mt8192-power.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Weiyi Lu <weiyi.lu@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8192_POWER_H
+#define _DT_BINDINGS_POWER_MT8192_POWER_H
+
+#define MT8192_POWER_DOMAIN_AUDIO 0
+#define MT8192_POWER_DOMAIN_CONN 1
+#define MT8192_POWER_DOMAIN_MFG0 2
+#define MT8192_POWER_DOMAIN_MFG1 3
+#define MT8192_POWER_DOMAIN_MFG2 4
+#define MT8192_POWER_DOMAIN_MFG3 5
+#define MT8192_POWER_DOMAIN_MFG4 6
+#define MT8192_POWER_DOMAIN_MFG5 7
+#define MT8192_POWER_DOMAIN_MFG6 8
+#define MT8192_POWER_DOMAIN_DISP 9
+#define MT8192_POWER_DOMAIN_IPE 10
+#define MT8192_POWER_DOMAIN_ISP 11
+#define MT8192_POWER_DOMAIN_ISP2 12
+#define MT8192_POWER_DOMAIN_MDP 13
+#define MT8192_POWER_DOMAIN_VENC 14
+#define MT8192_POWER_DOMAIN_VDEC 15
+#define MT8192_POWER_DOMAIN_VDEC2 16
+#define MT8192_POWER_DOMAIN_CAM 17
+#define MT8192_POWER_DOMAIN_CAM_RAWA 18
+#define MT8192_POWER_DOMAIN_CAM_RAWB 19
+#define MT8192_POWER_DOMAIN_CAM_RAWC 20
+
+#endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */
--
2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org, drinkcat@chromium.org,
weiyi.lu@mediatek.com, fparent@baylibre.com,
Rob Herring <robh+dt@kernel.org>,
linux-mediatek@lists.infradead.org, hsinyi@chromium.org,
matthias.bgg@gmail.com,
Collabora Kernel ML <kernel@collabora.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 14/16] dt-bindings: power: Add MT8192 power domains
Date: Mon, 26 Oct 2020 18:55:23 +0100 [thread overview]
Message-ID: <20201026175526.2915399-15-enric.balletbo@collabora.com> (raw)
In-Reply-To: <20201026175526.2915399-1-enric.balletbo@collabora.com>
From: Weiyi Lu <weiyi.lu@mediatek.com>
Add power domains dt-bindings for MT8192.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes in v3: None
Changes in v2: None
.../power/mediatek,power-controller.yaml | 2 ++
include/dt-bindings/power/mt8192-power.h | 32 +++++++++++++++++++
2 files changed, 34 insertions(+)
create mode 100644 include/dt-bindings/power/mt8192-power.h
diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index 7126c3c81570..0318ffb1133c 100644
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -25,6 +25,7 @@ properties:
enum:
- mediatek,mt8173-power-controller
- mediatek,mt8183-power-controller
+ - mediatek,mt8192-power-controller
'#power-domain-cells':
const: 1
@@ -60,6 +61,7 @@ patternProperties:
Power domain index. Valid values are defined in:
"include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.
"include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
+ "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
maxItems: 1
clocks:
diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h
new file mode 100644
index 000000000000..4eaa53d7270a
--- /dev/null
+++ b/include/dt-bindings/power/mt8192-power.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Weiyi Lu <weiyi.lu@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8192_POWER_H
+#define _DT_BINDINGS_POWER_MT8192_POWER_H
+
+#define MT8192_POWER_DOMAIN_AUDIO 0
+#define MT8192_POWER_DOMAIN_CONN 1
+#define MT8192_POWER_DOMAIN_MFG0 2
+#define MT8192_POWER_DOMAIN_MFG1 3
+#define MT8192_POWER_DOMAIN_MFG2 4
+#define MT8192_POWER_DOMAIN_MFG3 5
+#define MT8192_POWER_DOMAIN_MFG4 6
+#define MT8192_POWER_DOMAIN_MFG5 7
+#define MT8192_POWER_DOMAIN_MFG6 8
+#define MT8192_POWER_DOMAIN_DISP 9
+#define MT8192_POWER_DOMAIN_IPE 10
+#define MT8192_POWER_DOMAIN_ISP 11
+#define MT8192_POWER_DOMAIN_ISP2 12
+#define MT8192_POWER_DOMAIN_MDP 13
+#define MT8192_POWER_DOMAIN_VENC 14
+#define MT8192_POWER_DOMAIN_VDEC 15
+#define MT8192_POWER_DOMAIN_VDEC2 16
+#define MT8192_POWER_DOMAIN_CAM 17
+#define MT8192_POWER_DOMAIN_CAM_RAWA 18
+#define MT8192_POWER_DOMAIN_CAM_RAWB 19
+#define MT8192_POWER_DOMAIN_CAM_RAWC 20
+
+#endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */
--
2.28.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org, drinkcat@chromium.org,
weiyi.lu@mediatek.com, fparent@baylibre.com,
Rob Herring <robh+dt@kernel.org>,
linux-mediatek@lists.infradead.org, hsinyi@chromium.org,
matthias.bgg@gmail.com,
Collabora Kernel ML <kernel@collabora.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 14/16] dt-bindings: power: Add MT8192 power domains
Date: Mon, 26 Oct 2020 18:55:23 +0100 [thread overview]
Message-ID: <20201026175526.2915399-15-enric.balletbo@collabora.com> (raw)
In-Reply-To: <20201026175526.2915399-1-enric.balletbo@collabora.com>
From: Weiyi Lu <weiyi.lu@mediatek.com>
Add power domains dt-bindings for MT8192.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes in v3: None
Changes in v2: None
.../power/mediatek,power-controller.yaml | 2 ++
include/dt-bindings/power/mt8192-power.h | 32 +++++++++++++++++++
2 files changed, 34 insertions(+)
create mode 100644 include/dt-bindings/power/mt8192-power.h
diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index 7126c3c81570..0318ffb1133c 100644
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -25,6 +25,7 @@ properties:
enum:
- mediatek,mt8173-power-controller
- mediatek,mt8183-power-controller
+ - mediatek,mt8192-power-controller
'#power-domain-cells':
const: 1
@@ -60,6 +61,7 @@ patternProperties:
Power domain index. Valid values are defined in:
"include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.
"include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
+ "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
maxItems: 1
clocks:
diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h
new file mode 100644
index 000000000000..4eaa53d7270a
--- /dev/null
+++ b/include/dt-bindings/power/mt8192-power.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Weiyi Lu <weiyi.lu@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8192_POWER_H
+#define _DT_BINDINGS_POWER_MT8192_POWER_H
+
+#define MT8192_POWER_DOMAIN_AUDIO 0
+#define MT8192_POWER_DOMAIN_CONN 1
+#define MT8192_POWER_DOMAIN_MFG0 2
+#define MT8192_POWER_DOMAIN_MFG1 3
+#define MT8192_POWER_DOMAIN_MFG2 4
+#define MT8192_POWER_DOMAIN_MFG3 5
+#define MT8192_POWER_DOMAIN_MFG4 6
+#define MT8192_POWER_DOMAIN_MFG5 7
+#define MT8192_POWER_DOMAIN_MFG6 8
+#define MT8192_POWER_DOMAIN_DISP 9
+#define MT8192_POWER_DOMAIN_IPE 10
+#define MT8192_POWER_DOMAIN_ISP 11
+#define MT8192_POWER_DOMAIN_ISP2 12
+#define MT8192_POWER_DOMAIN_MDP 13
+#define MT8192_POWER_DOMAIN_VENC 14
+#define MT8192_POWER_DOMAIN_VDEC 15
+#define MT8192_POWER_DOMAIN_VDEC2 16
+#define MT8192_POWER_DOMAIN_CAM 17
+#define MT8192_POWER_DOMAIN_CAM_RAWA 18
+#define MT8192_POWER_DOMAIN_CAM_RAWB 19
+#define MT8192_POWER_DOMAIN_CAM_RAWC 20
+
+#endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */
--
2.28.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-26 17:55 UTC|newest]
Thread overview: 101+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 17:55 [PATCH v3 00/16] soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 01/16] dt-bindings: power: Add bindings for the Mediatek " Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-28 13:55 ` Rob Herring
2020-10-28 13:55 ` Rob Herring
2020-10-28 13:55 ` Rob Herring
2020-10-28 13:57 ` Rob Herring
2020-10-28 13:57 ` Rob Herring
2020-10-28 13:57 ` Rob Herring
2020-10-26 17:55 ` [PATCH v3 02/16] soc: mediatek: Add MediaTek SCPSYS power domains Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-27 0:55 ` Nicolas Boichat
2020-10-27 0:55 ` Nicolas Boichat
2020-10-27 0:55 ` Nicolas Boichat
2020-10-30 10:54 ` Enric Balletbo i Serra
2020-10-30 10:54 ` Enric Balletbo i Serra
2020-10-30 10:54 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 03/16] arm64: dts: mediatek: Add mt8173 power domain controller Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 04/16] soc: mediatek: pm-domains: Add bus protection protocol Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-27 0:58 ` Nicolas Boichat
2020-10-27 0:58 ` Nicolas Boichat
2020-10-27 0:58 ` Nicolas Boichat
2020-10-27 11:07 ` Weiyi Lu
2020-10-27 11:07 ` Weiyi Lu
2020-10-27 11:07 ` Weiyi Lu
2020-10-30 10:55 ` Enric Balletbo i Serra
2020-10-30 10:55 ` Enric Balletbo i Serra
2020-10-30 10:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 05/16] soc: mediatek: pm_domains: Make bus protection generic Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-27 2:41 ` Nicolas Boichat
2020-10-27 2:41 ` Nicolas Boichat
2020-10-27 2:41 ` Nicolas Boichat
2020-10-27 12:57 ` Fabien Parent
2020-10-27 12:57 ` Fabien Parent
2020-10-27 12:57 ` Fabien Parent
2020-10-29 14:49 ` Matthias Brugger
2020-10-29 14:49 ` Matthias Brugger
2020-10-29 14:49 ` Matthias Brugger
2020-10-26 17:55 ` [PATCH v3 06/16] soc: mediatek: pm-domains: Add SMI block as bus protection block Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-27 2:44 ` Nicolas Boichat
2020-10-27 2:44 ` Nicolas Boichat
2020-10-27 2:44 ` Nicolas Boichat
2020-10-30 10:56 ` Enric Balletbo i Serra
2020-10-30 10:56 ` Enric Balletbo i Serra
2020-10-30 10:56 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 07/16] soc: mediatek: pm-domains: Add extra sram control Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-27 2:47 ` Nicolas Boichat
2020-10-27 2:47 ` Nicolas Boichat
2020-10-27 2:47 ` Nicolas Boichat
2020-10-26 17:55 ` [PATCH v3 08/16] soc: mediatek: pm-domains: Add subsystem clocks Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 09/16] soc: mediatek: pm-domains: Allow bus protection to ignore clear ack Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 10/16] dt-bindings: power: Add MT8183 power domains Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 11/16] soc: mediatek: pm-domains: Add support for mt8183 Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 12/16] arm64: dts: mediatek: Add smi_common node for MT8183 Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 13/16] arm64: dts: mediatek: Add mt8183 power domains controller Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra [this message]
2020-10-26 17:55 ` [PATCH v3 14/16] dt-bindings: power: Add MT8192 power domains Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 15/16] soc: mediatek: pm-domains: Add default power off flag Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-27 10:53 ` Matthias Brugger
2020-10-27 10:53 ` Matthias Brugger
2020-10-27 10:53 ` Matthias Brugger
2020-10-27 11:18 ` Weiyi Lu
2020-10-27 11:18 ` Weiyi Lu
2020-10-29 14:51 ` Matthias Brugger
2020-10-29 14:51 ` Matthias Brugger
2020-10-29 14:51 ` Matthias Brugger
2020-10-30 11:17 ` Enric Balletbo i Serra
2020-10-30 11:17 ` Enric Balletbo i Serra
2020-10-30 11:17 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 16/16] soc: mediatek: pm-domains: Add support for mt8192 Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` Enric Balletbo i Serra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201026175526.2915399-15-enric.balletbo@collabora.com \
--to=enric.balletbo@collabora.com \
--cc=devicetree@vger.kernel.org \
--cc=drinkcat@chromium.org \
--cc=fparent@baylibre.com \
--cc=hsinyi@chromium.org \
--cc=kernel@collabora.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=robh+dt@kernel.org \
--cc=weiyi.lu@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.