From: Kefeng Wang <wangkefeng.wang@huawei.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
<linux-riscv@lists.infradead.org>
Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
Subject: [PATCH] riscv: Make RISCV_TIMER depends on RISCV_SBI
Date: Wed, 28 Oct 2020 21:12:30 +0800 [thread overview]
Message-ID: <20201028131230.72907-1-wangkefeng.wang@huawei.com> (raw)
The riscv timer is set via SBI timer call, let's make RISCV_TIMER
depends on RISCV_SBI, and it also fixes some build issue.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
---
drivers/clocksource/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 68b087bff59c..2be849bb794a 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -654,7 +654,7 @@ config ATCPIT100_TIMER
config RISCV_TIMER
bool "Timer for the RISC-V platform" if COMPILE_TEST
- depends on GENERIC_SCHED_CLOCK && RISCV
+ depends on GENERIC_SCHED_CLOCK && RISCV && RISCV_SBI
select TIMER_PROBE
select TIMER_OF
help
--
2.26.2
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next reply other threads:[~2020-10-28 13:07 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 13:12 Kefeng Wang [this message]
2020-11-06 7:14 ` [PATCH] riscv: Make RISCV_TIMER depends on RISCV_SBI Palmer Dabbelt
2020-11-27 2:53 ` Kefeng Wang
2020-12-03 23:47 ` [tip: timers/core] clocksource/drivers/riscv: " tip-bot2 for Kefeng Wang
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