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From: Stefan Riedmueller <s.riedmueller@phytec.de>
To: Shawn Guo <shawnguo@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Stefan Riedmueller <s.riedmueller@phytec.de>
Subject: [PATCH v2 3/6] ARM: dts: imx6: phytec: Add eeprom pagesize
Date: Thu, 29 Oct 2020 08:03:21 +0100	[thread overview]
Message-ID: <20201029070324.16057-3-s.riedmueller@phytec.de> (raw)
In-Reply-To: <20201029070324.16057-1-s.riedmueller@phytec.de>

Defining the EEPROM pagesize can increase the write speed significantly.
Set it to the pagesize stated in the EEPROM's datasheet for
phyCORE-i.MX 6UL, phyCORE-i.MX 6 and phyFLEX-i.MX 6.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
---
 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi      | 1 +
 arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi | 1 +
 arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi  | 1 +
 3 files changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index d51852857758..7a1e53195785 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -117,6 +117,7 @@ &i2c1 {
 
 	som_eeprom: eeprom@50 {
 		compatible = "catalyst,24c32", "atmel,24c32";
+		pagesize = <32>;
 		reg = <0x50>;
 	};
 
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
index a3f4e8f6cc9e..a80aa08a37cb 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -85,6 +85,7 @@ &i2c3 {
 
 	eeprom@50 {
 		compatible = "st,24c32", "atmel,24c32";
+		pagesize = <32>;
 		reg = <0x50>;
 	};
 
diff --git a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
index ce14ce685d12..11fa3fb5947b 100644
--- a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
@@ -75,6 +75,7 @@ &i2c1 {
 
 	eeprom@52 {
 		compatible = "catalyst,24c32", "atmel,24c32";
+		pagesize = <32>;
 		reg = <0x52>;
 	};
 };
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Stefan Riedmueller <s.riedmueller@phytec.de>
To: Shawn Guo <shawnguo@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	Stefan Riedmueller <s.riedmueller@phytec.de>,
	devicetree@vger.kernel.org, Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/6] ARM: dts: imx6: phytec: Add eeprom pagesize
Date: Thu, 29 Oct 2020 08:03:21 +0100	[thread overview]
Message-ID: <20201029070324.16057-3-s.riedmueller@phytec.de> (raw)
In-Reply-To: <20201029070324.16057-1-s.riedmueller@phytec.de>

Defining the EEPROM pagesize can increase the write speed significantly.
Set it to the pagesize stated in the EEPROM's datasheet for
phyCORE-i.MX 6UL, phyCORE-i.MX 6 and phyFLEX-i.MX 6.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
---
 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi      | 1 +
 arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi | 1 +
 arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi  | 1 +
 3 files changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index d51852857758..7a1e53195785 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -117,6 +117,7 @@ &i2c1 {
 
 	som_eeprom: eeprom@50 {
 		compatible = "catalyst,24c32", "atmel,24c32";
+		pagesize = <32>;
 		reg = <0x50>;
 	};
 
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
index a3f4e8f6cc9e..a80aa08a37cb 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -85,6 +85,7 @@ &i2c3 {
 
 	eeprom@50 {
 		compatible = "st,24c32", "atmel,24c32";
+		pagesize = <32>;
 		reg = <0x50>;
 	};
 
diff --git a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
index ce14ce685d12..11fa3fb5947b 100644
--- a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
@@ -75,6 +75,7 @@ &i2c1 {
 
 	eeprom@52 {
 		compatible = "catalyst,24c32", "atmel,24c32";
+		pagesize = <32>;
 		reg = <0x52>;
 	};
 };
-- 
2.25.1


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  parent reply	other threads:[~2020-10-29  7:49 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-29  7:03 [PATCH v2 1/6] ARM: dts: imx6ul: segin: Fix stmpe touchscreen subnode name Stefan Riedmueller
2020-10-29  7:03 ` Stefan Riedmueller
2020-10-29  7:03 ` [PATCH v2 2/6] ARM: dts: imx6: phytec: Set correct eeprom compatible Stefan Riedmueller
2020-10-29  7:03   ` Stefan Riedmueller
2020-10-29  7:03 ` Stefan Riedmueller [this message]
2020-10-29  7:03   ` [PATCH v2 3/6] ARM: dts: imx6: phytec: Add eeprom pagesize Stefan Riedmueller
2020-10-29  7:03 ` [PATCH v2 4/6] ARM: dts: imx6ul: segin: Add phyBOARD-Segin with eMMC phyCORE-i.MX6UL Stefan Riedmueller
2020-10-29  7:03   ` Stefan Riedmueller
2020-11-10  0:40   ` Shawn Guo
2020-11-10  0:40     ` Shawn Guo
2020-10-29  7:03 ` [PATCH v2 5/6] ARM: dts: imx6ul: phytec: Add support for optional PEB-AV-02 LCD adapter Stefan Riedmueller
2020-10-29  7:03   ` Stefan Riedmueller
2020-10-29  7:03 ` [PATCH v2 6/6] ARM: dts: imx6ul: segin: peb-av-02: Mark stmpe touch as wakeup-source Stefan Riedmueller
2020-10-29  7:03   ` Stefan Riedmueller
2020-11-10  0:26 ` [PATCH v2 1/6] ARM: dts: imx6ul: segin: Fix stmpe touchscreen subnode name Shawn Guo
2020-11-10  0:26   ` Shawn Guo

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