From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Peter De Schrijver <pdeschrijver@nvidia.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Kyungmin Park <kyungmin.park@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com>, Mikko Perttunen <cyndis@kapsi.fi>, Viresh Kumar <vireshk@kernel.org>, Peter Geis <pgwipeout@gmail.com>, Nicolas Chauvet <kwizart@gmail.com>, Krzysztof Kozlowski <krzk@kernel.org> Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v7 18/47] dt-bindings: memory: tegra30: Add memory client IDs Date: Wed, 4 Nov 2020 19:48:54 +0300 [thread overview] Message-ID: <20201104164923.21238-19-digetx@gmail.com> (raw) In-Reply-To: <20201104164923.21238-1-digetx@gmail.com> Each memory client has unique hardware ID, add these IDs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- include/dt-bindings/memory/tegra30-mc.h | 67 +++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/include/dt-bindings/memory/tegra30-mc.h b/include/dt-bindings/memory/tegra30-mc.h index 169f005fbc78..930f708aca17 100644 --- a/include/dt-bindings/memory/tegra30-mc.h +++ b/include/dt-bindings/memory/tegra30-mc.h @@ -41,4 +41,71 @@ #define TEGRA30_MC_RESET_VDE 16 #define TEGRA30_MC_RESET_VI 17 +#define TEGRA30_MC_PTCR 0 +#define TEGRA30_MC_DISPLAY0A 1 +#define TEGRA30_MC_DISPLAY0AB 2 +#define TEGRA30_MC_DISPLAY0B 3 +#define TEGRA30_MC_DISPLAY0BB 4 +#define TEGRA30_MC_DISPLAY0C 5 +#define TEGRA30_MC_DISPLAY0CB 6 +#define TEGRA30_MC_DISPLAY1B 7 +#define TEGRA30_MC_DISPLAY1BB 8 +#define TEGRA30_MC_EPPUP 9 +#define TEGRA30_MC_G2PR 10 +#define TEGRA30_MC_G2SR 11 +#define TEGRA30_MC_MPEUNIFBR 12 +#define TEGRA30_MC_VIRUV 13 +#define TEGRA30_MC_AFIR 14 +#define TEGRA30_MC_AVPCARM7R 15 +#define TEGRA30_MC_DISPLAYHC 16 +#define TEGRA30_MC_DISPLAYHCB 17 +#define TEGRA30_MC_FDCDRD 18 +#define TEGRA30_MC_FDCDRD2 19 +#define TEGRA30_MC_G2DR 20 +#define TEGRA30_MC_HDAR 21 +#define TEGRA30_MC_HOST1XDMAR 22 +#define TEGRA30_MC_HOST1XR 23 +#define TEGRA30_MC_IDXSRD 24 +#define TEGRA30_MC_IDXSRD2 25 +#define TEGRA30_MC_MPE_IPRED 26 +#define TEGRA30_MC_MPEAMEMRD 27 +#define TEGRA30_MC_MPECSRD 28 +#define TEGRA30_MC_PPCSAHBDMAR 29 +#define TEGRA30_MC_PPCSAHBSLVR 30 +#define TEGRA30_MC_SATAR 31 +#define TEGRA30_MC_TEXSRD 32 +#define TEGRA30_MC_TEXSRD2 33 +#define TEGRA30_MC_VDEBSEVR 34 +#define TEGRA30_MC_VDEMBER 35 +#define TEGRA30_MC_VDEMCER 36 +#define TEGRA30_MC_VDETPER 37 +#define TEGRA30_MC_MPCORELPR 38 +#define TEGRA30_MC_MPCORER 39 +#define TEGRA30_MC_EPPU 40 +#define TEGRA30_MC_EPPV 41 +#define TEGRA30_MC_EPPY 42 +#define TEGRA30_MC_MPEUNIFBW 43 +#define TEGRA30_MC_VIWSB 44 +#define TEGRA30_MC_VIWU 45 +#define TEGRA30_MC_VIWV 46 +#define TEGRA30_MC_VIWY 47 +#define TEGRA30_MC_G2DW 48 +#define TEGRA30_MC_AFIW 49 +#define TEGRA30_MC_AVPCARM7W 50 +#define TEGRA30_MC_FDCDWR 51 +#define TEGRA30_MC_FDCDWR2 52 +#define TEGRA30_MC_HDAW 53 +#define TEGRA30_MC_HOST1XW 54 +#define TEGRA30_MC_ISPW 55 +#define TEGRA30_MC_MPCORELPW 56 +#define TEGRA30_MC_MPCOREW 57 +#define TEGRA30_MC_MPECSWR 58 +#define TEGRA30_MC_PPCSAHBDMAW 59 +#define TEGRA30_MC_PPCSAHBSLVW 60 +#define TEGRA30_MC_SATAW 61 +#define TEGRA30_MC_VDEBSEVW 62 +#define TEGRA30_MC_VDEDBGW 63 +#define TEGRA30_MC_VDEMBEW 64 +#define TEGRA30_MC_VDETPMW 65 + #endif -- 2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Peter De Schrijver <pdeschrijver@nvidia.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Kyungmin Park <kyungmin.park@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com>, Mikko Perttunen <cyndis@kapsi.fi>, Viresh Kumar <vireshk@kernel.org>, Peter Geis <pgwipeout@gmail.com>, Nicolas Chauvet <kwizart@gmail.com>, Krzysztof Kozlowski <krzk@kernel.org> Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Subject: [PATCH v7 18/47] dt-bindings: memory: tegra30: Add memory client IDs Date: Wed, 4 Nov 2020 19:48:54 +0300 [thread overview] Message-ID: <20201104164923.21238-19-digetx@gmail.com> (raw) In-Reply-To: <20201104164923.21238-1-digetx@gmail.com> Each memory client has unique hardware ID, add these IDs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- include/dt-bindings/memory/tegra30-mc.h | 67 +++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/include/dt-bindings/memory/tegra30-mc.h b/include/dt-bindings/memory/tegra30-mc.h index 169f005fbc78..930f708aca17 100644 --- a/include/dt-bindings/memory/tegra30-mc.h +++ b/include/dt-bindings/memory/tegra30-mc.h @@ -41,4 +41,71 @@ #define TEGRA30_MC_RESET_VDE 16 #define TEGRA30_MC_RESET_VI 17 +#define TEGRA30_MC_PTCR 0 +#define TEGRA30_MC_DISPLAY0A 1 +#define TEGRA30_MC_DISPLAY0AB 2 +#define TEGRA30_MC_DISPLAY0B 3 +#define TEGRA30_MC_DISPLAY0BB 4 +#define TEGRA30_MC_DISPLAY0C 5 +#define TEGRA30_MC_DISPLAY0CB 6 +#define TEGRA30_MC_DISPLAY1B 7 +#define TEGRA30_MC_DISPLAY1BB 8 +#define TEGRA30_MC_EPPUP 9 +#define TEGRA30_MC_G2PR 10 +#define TEGRA30_MC_G2SR 11 +#define TEGRA30_MC_MPEUNIFBR 12 +#define TEGRA30_MC_VIRUV 13 +#define TEGRA30_MC_AFIR 14 +#define TEGRA30_MC_AVPCARM7R 15 +#define TEGRA30_MC_DISPLAYHC 16 +#define TEGRA30_MC_DISPLAYHCB 17 +#define TEGRA30_MC_FDCDRD 18 +#define TEGRA30_MC_FDCDRD2 19 +#define TEGRA30_MC_G2DR 20 +#define TEGRA30_MC_HDAR 21 +#define TEGRA30_MC_HOST1XDMAR 22 +#define TEGRA30_MC_HOST1XR 23 +#define TEGRA30_MC_IDXSRD 24 +#define TEGRA30_MC_IDXSRD2 25 +#define TEGRA30_MC_MPE_IPRED 26 +#define TEGRA30_MC_MPEAMEMRD 27 +#define TEGRA30_MC_MPECSRD 28 +#define TEGRA30_MC_PPCSAHBDMAR 29 +#define TEGRA30_MC_PPCSAHBSLVR 30 +#define TEGRA30_MC_SATAR 31 +#define TEGRA30_MC_TEXSRD 32 +#define TEGRA30_MC_TEXSRD2 33 +#define TEGRA30_MC_VDEBSEVR 34 +#define TEGRA30_MC_VDEMBER 35 +#define TEGRA30_MC_VDEMCER 36 +#define TEGRA30_MC_VDETPER 37 +#define TEGRA30_MC_MPCORELPR 38 +#define TEGRA30_MC_MPCORER 39 +#define TEGRA30_MC_EPPU 40 +#define TEGRA30_MC_EPPV 41 +#define TEGRA30_MC_EPPY 42 +#define TEGRA30_MC_MPEUNIFBW 43 +#define TEGRA30_MC_VIWSB 44 +#define TEGRA30_MC_VIWU 45 +#define TEGRA30_MC_VIWV 46 +#define TEGRA30_MC_VIWY 47 +#define TEGRA30_MC_G2DW 48 +#define TEGRA30_MC_AFIW 49 +#define TEGRA30_MC_AVPCARM7W 50 +#define TEGRA30_MC_FDCDWR 51 +#define TEGRA30_MC_FDCDWR2 52 +#define TEGRA30_MC_HDAW 53 +#define TEGRA30_MC_HOST1XW 54 +#define TEGRA30_MC_ISPW 55 +#define TEGRA30_MC_MPCORELPW 56 +#define TEGRA30_MC_MPCOREW 57 +#define TEGRA30_MC_MPECSWR 58 +#define TEGRA30_MC_PPCSAHBDMAW 59 +#define TEGRA30_MC_PPCSAHBSLVW 60 +#define TEGRA30_MC_SATAW 61 +#define TEGRA30_MC_VDEBSEVW 62 +#define TEGRA30_MC_VDEDBGW 63 +#define TEGRA30_MC_VDEMBEW 64 +#define TEGRA30_MC_VDETPMW 65 + #endif -- 2.27.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-11-04 16:49 UTC|newest] Thread overview: 188+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-04 16:48 [PATCH v7 00/47] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 01/47] clk: tegra: Export Tegra20 EMC kernel symbols Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:23 ` Krzysztof Kozlowski 2020-11-06 18:23 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 02/47] soc/tegra: fuse: Export tegra_read_ram_code() Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:24 ` Krzysztof Kozlowski 2020-11-06 18:24 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 03/47] soc/tegra: fuse: Add stub for tegra_sku_info Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:25 ` Krzysztof Kozlowski 2020-11-06 18:25 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 04/47] dt-bindings: memory: tegra20: emc: Correct registers range in example Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:28 ` Krzysztof Kozlowski 2020-11-06 18:28 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 05/47] dt-bindings: memory: tegra20: emc: Document nvidia,memory-controller property Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 05/47] dt-bindings: memory: tegra20: emc: Document nvidia, memory-controller property Dmitry Osipenko 2020-11-06 18:29 ` [PATCH v7 05/47] dt-bindings: memory: tegra20: emc: Document nvidia,memory-controller property Krzysztof Kozlowski 2020-11-06 18:29 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 06/47] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:30 ` Krzysztof Kozlowski 2020-11-06 18:30 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 07/47] dt-bindings: memory: tegra20: emc: " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:30 ` Krzysztof Kozlowski 2020-11-06 18:30 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 08/47] dt-bindings: memory: tegra20: emc: Document OPP table and voltage regulator Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-05 19:48 ` Rob Herring 2020-11-05 19:48 ` Rob Herring 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 09/47] dt-bindings: memory: tegra30: mc: Document new interconnect property Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 10/47] dt-bindings: memory: tegra30: emc: " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-06 18:31 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 11/47] dt-bindings: memory: tegra30: emc: Document OPP table and voltage regulator Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:32 ` Krzysztof Kozlowski 2020-11-06 18:32 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 12/47] dt-bindings: memory: tegra124: mc: Document new interconnect property Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-05 19:49 ` Rob Herring 2020-11-05 19:49 ` Rob Herring 2020-11-06 18:33 ` Krzysztof Kozlowski 2020-11-06 18:33 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 13/47] dt-bindings: memory: tegra124: emc: " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:34 ` Krzysztof Kozlowski 2020-11-06 18:34 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 14/47] dt-bindings: memory: tegra124: emc: Document OPP table and voltage regulator Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:36 ` Krzysztof Kozlowski 2020-11-06 18:36 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 15/47] dt-bindings: tegra30-actmon: Document OPP and interconnect properties Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:34 ` Krzysztof Kozlowski 2020-11-06 18:34 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 16/47] dt-bindings: host1x: Document new " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:36 ` Krzysztof Kozlowski 2020-11-06 18:36 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 17/47] dt-bindings: memory: tegra20: Add memory client IDs Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:38 ` Krzysztof Kozlowski 2020-11-06 18:38 ` Krzysztof Kozlowski 2020-11-26 17:26 ` Thierry Reding 2020-11-26 17:26 ` Thierry Reding 2020-11-26 17:39 ` Krzysztof Kozlowski 2020-11-26 17:39 ` Krzysztof Kozlowski 2020-11-26 17:45 ` Krzysztof Kozlowski 2020-11-26 17:45 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-26 17:59 ` Thierry Reding 2020-11-26 17:59 ` Thierry Reding 2020-11-26 18:02 ` Thierry Reding 2020-11-26 18:02 ` Thierry Reding 2020-11-26 18:06 ` Krzysztof Kozlowski 2020-11-26 18:06 ` Krzysztof Kozlowski 2020-11-04 16:48 ` Dmitry Osipenko [this message] 2020-11-04 16:48 ` [PATCH v7 18/47] dt-bindings: memory: tegra30: " Dmitry Osipenko 2020-11-06 18:38 ` Krzysztof Kozlowski 2020-11-06 18:38 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 19/47] dt-bindings: memory: tegra124: " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-06 18:39 ` Krzysztof Kozlowski 2020-11-06 18:39 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-26 17:55 ` Krzysztof Kozlowski 2020-11-04 16:48 ` [PATCH v7 20/47] ARM: tegra: Correct EMC registers size in Tegra20 device-tree Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 21/47] ARM: tegra: Add interconnect properties to " Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 22/47] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:48 ` [PATCH v7 23/47] ARM: tegra: Add interconnect properties to Tegra124 device-tree Dmitry Osipenko 2020-11-04 16:48 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 24/47] ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 24/47] ARM: tegra: Add nvidia, memory-controller " Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 25/47] ARM: tegra: Add DVFS properties to Tegra20 EMC device-tree node Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 26/47] ARM: tegra: Add DVFS properties to Tegra30 EMC and ACTMON device-tree nodes Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 27/47] ARM: tegra: Add DVFS properties to Tegra124 " Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 28/47] memory: tegra: Add and use devm_tegra_memory_controller_get() Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:02 ` Krzysztof Kozlowski 2020-11-06 19:02 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 29/47] memory: tegra: Use devm_platform_ioremap_resource() Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:03 ` Krzysztof Kozlowski 2020-11-06 19:03 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 30/47] memory: tegra: Remove superfluous error messages around platform_get_irq() Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:04 ` Krzysztof Kozlowski 2020-11-06 19:04 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 31/47] memory: tegra: Add missing latency allowness entry for Page Table Cache Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:05 ` Krzysztof Kozlowski 2020-11-06 19:05 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 32/47] memory: tegra-mc: Add interconnect framework Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:07 ` Krzysztof Kozlowski 2020-11-06 19:07 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 33/47] memory: tegra20-emc: Make driver modular Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:07 ` Krzysztof Kozlowski 2020-11-06 19:07 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 34/47] memory: tegra20-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:08 ` Krzysztof Kozlowski 2020-11-06 19:08 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 35/47] memory: tegra20: Support interconnect framework Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-06 19:10 ` Krzysztof Kozlowski 2020-11-06 19:10 ` Krzysztof Kozlowski 2020-11-04 16:49 ` [PATCH v7 36/47] memory: tegra20-emc: Add devfreq support Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-05 2:30 ` Chanwoo Choi 2020-11-05 2:30 ` Chanwoo Choi 2020-11-05 13:50 ` Dmitry Osipenko 2020-11-05 13:50 ` Dmitry Osipenko 2020-11-06 19:13 ` Krzysztof Kozlowski 2020-11-06 19:13 ` Krzysztof Kozlowski 2020-11-06 21:53 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 37/47] memory: tegra30: Add FIFO sizes to memory clients Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 38/47] memory: tegra30-emc: Make driver modular Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 39/47] memory: tegra30-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 40/47] memory: tegra30: Support interconnect framework Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 41/47] memory: tegra124-emc: Make driver modular Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 42/47] memory: tegra124: Support interconnect framework Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 43/47] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-09 4:02 ` kernel test robot 2020-11-04 16:49 ` [PATCH v7 44/47] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-04 16:49 ` [PATCH v7 45/47] PM / devfreq: tegra30: Support interconnect and OPPs from device-tree Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-05 2:22 ` Chanwoo Choi 2020-11-05 2:22 ` Chanwoo Choi 2020-11-04 16:49 ` [PATCH v7 46/47] PM / devfreq: tegra30: Separate configurations per-SoC generation Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-05 2:23 ` Chanwoo Choi 2020-11-05 2:23 ` Chanwoo Choi 2020-11-04 16:49 ` [PATCH v7 47/47] PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver Dmitry Osipenko 2020-11-04 16:49 ` Dmitry Osipenko 2020-11-05 2:25 ` Chanwoo Choi 2020-11-05 2:25 ` Chanwoo Choi 2020-11-05 13:50 ` Dmitry Osipenko 2020-11-05 13:50 ` Dmitry Osipenko
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