From: Konrad Dybcio <konrad.dybcio@somainline.org> To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio <konrad.dybcio@somainline.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>, Stephen Boyd <swboyd@chromium.org>, Rob Herring <robh@kernel.org>, Marc Zyngier <maz@kernel.org>, Suzuki K Poulose <suzuki.poulose@arm.com>, Steven Price <steven.price@arm.com>, Mark Brown <broonie@kernel.org>, Andrew Scull <ascull@google.com>, Anshuman Khandual <anshuman.khandual@arm.com>, Amit Daniel Kachhap <amit.kachhap@arm.com>, Ionela Voinescu <ionela.voinescu@arm.com>, Kristina Martsenko <kristina.martsenko@arm.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] arm64: Add MIDR value for KRYO2XX gold/silver CPU cores Date: Thu, 5 Nov 2020 00:22:10 +0100 [thread overview] Message-ID: <20201104232218.198800-2-konrad.dybcio@somainline.org> (raw) In-Reply-To: <20201104232218.198800-1-konrad.dybcio@somainline.org> Add MIDR value for KRYO2XX gold (big) and silver (LITTLE) CPU cores which are used in Qualcomm Technologies, Inc. SoCs. This will be used to identify and apply errata which are applicable for these CPU cores. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> --- arch/arm64/include/asm/cputype.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 9e2e9a63c7b6..ef5b040dee44 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -86,6 +86,8 @@ #define QCOM_CPU_PART_FALKOR_V1 0x800 #define QCOM_CPU_PART_FALKOR 0xC00 #define QCOM_CPU_PART_KRYO 0x200 +#define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800 +#define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801 #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 #define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804 #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 @@ -116,6 +118,8 @@ #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1) #define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR) #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO) +#define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD) +#define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER) #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER) #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD) #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER) -- 2.29.2
WARNING: multiple messages have this Message-ID (diff)
From: Konrad Dybcio <konrad.dybcio@somainline.org> To: phone-devel@vger.kernel.org Cc: Rob Herring <robh@kernel.org>, Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>, Marc Zyngier <maz@kernel.org>, Ionela Voinescu <ionela.voinescu@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Anshuman Khandual <anshuman.khandual@arm.com>, Konrad Dybcio <konrad.dybcio@somainline.org>, linux-kernel@vger.kernel.org, Kristina Martsenko <kristina.martsenko@arm.com>, Stephen Boyd <swboyd@chromium.org>, Mark Brown <broonie@kernel.org>, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, angelogioacchino.delregno@somainline.org, Amit Daniel Kachhap <amit.kachhap@arm.com>, marijn.suijten@somainline.org, Steven Price <steven.price@arm.com>, Will Deacon <will@kernel.org>, linux-arm-kernel@lists.infradead.org, Andrew Scull <ascull@google.com> Subject: [PATCH 1/4] arm64: Add MIDR value for KRYO2XX gold/silver CPU cores Date: Thu, 5 Nov 2020 00:22:10 +0100 [thread overview] Message-ID: <20201104232218.198800-2-konrad.dybcio@somainline.org> (raw) In-Reply-To: <20201104232218.198800-1-konrad.dybcio@somainline.org> Add MIDR value for KRYO2XX gold (big) and silver (LITTLE) CPU cores which are used in Qualcomm Technologies, Inc. SoCs. This will be used to identify and apply errata which are applicable for these CPU cores. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> --- arch/arm64/include/asm/cputype.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 9e2e9a63c7b6..ef5b040dee44 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -86,6 +86,8 @@ #define QCOM_CPU_PART_FALKOR_V1 0x800 #define QCOM_CPU_PART_FALKOR 0xC00 #define QCOM_CPU_PART_KRYO 0x200 +#define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800 +#define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801 #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 #define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804 #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 @@ -116,6 +118,8 @@ #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1) #define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR) #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO) +#define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD) +#define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER) #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER) #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD) #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER) -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-11-04 23:28 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-04 23:22 [PATCH 0/4] Add KRYO2XX Errata / mitigations data Konrad Dybcio 2020-11-04 23:22 ` Konrad Dybcio 2020-11-04 23:22 ` Konrad Dybcio [this message] 2020-11-04 23:22 ` [PATCH 1/4] arm64: Add MIDR value for KRYO2XX gold/silver CPU cores Konrad Dybcio 2020-11-04 23:22 ` [PATCH 2/4] arm64: kpti: Add KRYO2XX gold/silver CPU cores to kpti safelist Konrad Dybcio 2020-11-04 23:22 ` Konrad Dybcio 2020-11-04 23:22 ` [PATCH 3/4] arm64: proton-pack: Add KRYO2XX silver CPUs to spectre-v2 safe-list Konrad Dybcio 2020-11-04 23:22 ` Konrad Dybcio 2020-11-04 23:22 ` [PATCH 4/4] arm64: cpu_errata: Apply Erratum 845719 to KRYO2XX Silver Konrad Dybcio 2020-11-04 23:22 ` Konrad Dybcio 2020-11-05 9:29 ` Marc Zyngier 2020-11-05 9:29 ` Marc Zyngier 2020-11-05 11:24 ` Konrad Dybcio 2020-11-05 11:24 ` Konrad Dybcio 2020-11-09 9:36 ` Sai Prakash Ranjan 2020-11-09 9:36 ` Sai Prakash Ranjan 2020-11-09 19:28 ` Konrad Dybcio 2020-11-09 19:28 ` Konrad Dybcio 2020-11-10 5:56 ` Sai Prakash Ranjan 2020-11-10 5:56 ` Sai Prakash Ranjan 2020-11-05 9:33 ` [PATCH 0/4] Add KRYO2XX Errata / mitigations data Will Deacon 2020-11-05 9:33 ` Will Deacon 2020-11-10 7:00 ` Sai Prakash Ranjan 2020-11-10 7:00 ` Sai Prakash Ranjan 2020-11-13 11:27 ` Will Deacon 2020-11-13 11:27 ` Will Deacon
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