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From: Konrad Dybcio <konrad.dybcio@somainline.org>
To: phone-devel@vger.kernel.org
Cc: ~postmarketos/upstreaming@lists.sr.ht,
	martin.botka@somainline.org,
	angelogioacchino.delregno@somainline.org,
	marijn.suijten@somainline.org,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
	Stephen Boyd <swboyd@chromium.org>, Rob Herring <robh@kernel.org>,
	Marc Zyngier <maz@kernel.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Steven Price <steven.price@arm.com>,
	Mark Brown <broonie@kernel.org>, Andrew Scull <ascull@google.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Amit Daniel Kachhap <amit.kachhap@arm.com>,
	Ionela Voinescu <ionela.voinescu@arm.com>,
	Kristina Martsenko <kristina.martsenko@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Vincenzo Frascino <vincenzo.frascino@arm.com>
Subject: [PATCH 2/4] arm64: kpti: Add KRYO2XX gold/silver CPU cores to kpti safelist
Date: Thu,  5 Nov 2020 00:22:11 +0100	[thread overview]
Message-ID: <20201104232218.198800-3-konrad.dybcio@somainline.org> (raw)
In-Reply-To: <20201104232218.198800-1-konrad.dybcio@somainline.org>

QCOM KRYO2XX gold (big) silver (LITTLE) CPU cores are based on
Cortex-A73 and Cortex-A53 respectively and are meltdown safe,
hence add them to kpti_safe_list[].

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
 arch/arm64/kernel/cpufeature.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index dcc165b3fc04..6f36c4f62f69 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1337,6 +1337,8 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
 		MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
 		MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL),
+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_GOLD),
+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER),
 		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
 		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
 		{ /* sentinel */ }
-- 
2.29.2


WARNING: multiple messages have this Message-ID (diff)
From: Konrad Dybcio <konrad.dybcio@somainline.org>
To: phone-devel@vger.kernel.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	angelogioacchino.delregno@somainline.org,
	Amit Daniel Kachhap <amit.kachhap@arm.com>,
	marijn.suijten@somainline.org,
	Vincenzo Frascino <vincenzo.frascino@arm.com>,
	Will Deacon <will@kernel.org>, Rob Herring <robh@kernel.org>,
	Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
	Marc Zyngier <maz@kernel.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Steven Price <steven.price@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Kristina Martsenko <kristina.martsenko@arm.com>,
	Stephen Boyd <swboyd@chromium.org>,
	Mark Brown <broonie@kernel.org>,
	martin.botka@somainline.org,
	~postmarketos/upstreaming@lists.sr.ht,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Ionela Voinescu <ionela.voinescu@arm.com>,
	Andrew Scull <ascull@google.com>
Subject: [PATCH 2/4] arm64: kpti: Add KRYO2XX gold/silver CPU cores to kpti safelist
Date: Thu,  5 Nov 2020 00:22:11 +0100	[thread overview]
Message-ID: <20201104232218.198800-3-konrad.dybcio@somainline.org> (raw)
In-Reply-To: <20201104232218.198800-1-konrad.dybcio@somainline.org>

QCOM KRYO2XX gold (big) silver (LITTLE) CPU cores are based on
Cortex-A73 and Cortex-A53 respectively and are meltdown safe,
hence add them to kpti_safe_list[].

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
 arch/arm64/kernel/cpufeature.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index dcc165b3fc04..6f36c4f62f69 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1337,6 +1337,8 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
 		MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
 		MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL),
+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_GOLD),
+		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER),
 		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
 		MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
 		{ /* sentinel */ }
-- 
2.29.2


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-11-04 23:32 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-04 23:22 [PATCH 0/4] Add KRYO2XX Errata / mitigations data Konrad Dybcio
2020-11-04 23:22 ` Konrad Dybcio
2020-11-04 23:22 ` [PATCH 1/4] arm64: Add MIDR value for KRYO2XX gold/silver CPU cores Konrad Dybcio
2020-11-04 23:22   ` Konrad Dybcio
2020-11-04 23:22 ` Konrad Dybcio [this message]
2020-11-04 23:22   ` [PATCH 2/4] arm64: kpti: Add KRYO2XX gold/silver CPU cores to kpti safelist Konrad Dybcio
2020-11-04 23:22 ` [PATCH 3/4] arm64: proton-pack: Add KRYO2XX silver CPUs to spectre-v2 safe-list Konrad Dybcio
2020-11-04 23:22   ` Konrad Dybcio
2020-11-04 23:22 ` [PATCH 4/4] arm64: cpu_errata: Apply Erratum 845719 to KRYO2XX Silver Konrad Dybcio
2020-11-04 23:22   ` Konrad Dybcio
2020-11-05  9:29   ` Marc Zyngier
2020-11-05  9:29     ` Marc Zyngier
2020-11-05 11:24     ` Konrad Dybcio
2020-11-05 11:24       ` Konrad Dybcio
2020-11-09  9:36     ` Sai Prakash Ranjan
2020-11-09  9:36       ` Sai Prakash Ranjan
2020-11-09 19:28       ` Konrad Dybcio
2020-11-09 19:28         ` Konrad Dybcio
2020-11-10  5:56         ` Sai Prakash Ranjan
2020-11-10  5:56           ` Sai Prakash Ranjan
2020-11-05  9:33 ` [PATCH 0/4] Add KRYO2XX Errata / mitigations data Will Deacon
2020-11-05  9:33   ` Will Deacon
2020-11-10  7:00   ` Sai Prakash Ranjan
2020-11-10  7:00     ` Sai Prakash Ranjan
2020-11-13 11:27 ` Will Deacon
2020-11-13 11:27   ` Will Deacon

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