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From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Alan Stern" <stern@rowland.harvard.edu>,
	"Peter Chen" <Peter.Chen@nxp.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Nicolas Chauvet" <kwizart@gmail.com>
Cc: linux-samsung-soc@vger.kernel.org, devel@driverdev.osuosl.org,
	linux-usb@vger.kernel.org, linux-pwm@vger.kernel.org,
	linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-media@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: [PATCH v1 17/30] mmc: sdhci-tegra: Support OPP and core voltage scaling
Date: Thu,  5 Nov 2020 02:44:14 +0300	[thread overview]
Message-ID: <20201104234427.26477-18-digetx@gmail.com> (raw)
In-Reply-To: <20201104234427.26477-1-digetx@gmail.com>

Add OPP and SoC core voltage scaling support to the Tegra SDHCI driver.
This is required for enabling system-wide DVFS on older Tegra SoCs.

Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/mmc/host/Kconfig       |  1 +
 drivers/mmc/host/sdhci-tegra.c | 70 ++++++++++++++++++++++++++++++++--
 2 files changed, 68 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 310e546e5898..7d719c81b917 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -293,6 +293,7 @@ config MMC_SDHCI_TEGRA
 	depends on MMC_SDHCI_PLTFM
 	select MMC_SDHCI_IO_ACCESSORS
 	select MMC_CQHCI
+	select PM_OPP
 	help
 	  This selects the Tegra SD/MMC controller. If you have a Tegra
 	  platform with SD or MMC devices, say Y or M here.
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index ed12aacb1c73..964709a3ccd6 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/pm_opp.h>
 #include <linux/pinctrl/consumer.h>
 #include <linux/regulator/consumer.h>
 #include <linux/reset.h>
@@ -754,10 +755,15 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
+	struct device *dev = mmc_dev(host->mmc);
 	unsigned long host_clk;
 
-	if (!clock)
-		return sdhci_set_clock(host, clock);
+	/* disable clock and then remove OPP performance/voltage vote */
+	if (!clock) {
+		sdhci_set_clock(host, clock);
+		dev_pm_opp_set_rate(dev, clock);
+		return;
+	}
 
 	/*
 	 * In DDR50/52 modes the Tegra SDHCI controllers require the SDHCI
@@ -772,7 +778,7 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	 * from clk_get_rate() is used.
 	 */
 	host_clk = tegra_host->ddr_signaling ? clock * 2 : clock;
-	clk_set_rate(pltfm_host->clk, host_clk);
+	dev_pm_opp_set_rate(dev, host_clk);
 	tegra_host->curr_clk_rate = host_clk;
 	if (tegra_host->ddr_signaling)
 		host->max_clk = host_clk;
@@ -1558,6 +1564,60 @@ static int sdhci_tegra_add_host(struct sdhci_host *host)
 	return ret;
 }
 
+static void sdhci_tegra_deinit_opp_table(void *data)
+{
+	struct device *dev = data;
+	struct opp_table *opp_table;
+
+	opp_table = dev_pm_opp_get_opp_table(dev);
+	dev_pm_opp_of_remove_table(dev);
+	dev_pm_opp_put_regulators(opp_table);
+	dev_pm_opp_put_opp_table(opp_table);
+}
+
+static int devm_sdhci_tegra_init_opp_table(struct device *dev)
+{
+	struct opp_table *opp_table;
+	const char *rname = "core";
+	int err;
+
+	/* voltage scaling is optional */
+	if (device_property_present(dev, "core-supply"))
+		opp_table = dev_pm_opp_set_regulators(dev, &rname, 1);
+	else
+		opp_table = dev_pm_opp_get_opp_table(dev);
+
+	if (IS_ERR(opp_table))
+		return dev_err_probe(dev, PTR_ERR(opp_table),
+				    "failed to prepare OPP table\n");
+
+	/*
+	 * OPP table presence is optional and we want the set_rate() of OPP
+	 * API to work similarly to clk_set_rate() if table is missing in a
+	 * device-tree.  The add_table() errors out if OPP is missing in DT.
+	 */
+	if (device_property_present(dev, "operating-points-v2")) {
+		err = dev_pm_opp_of_add_table(dev);
+		if (err) {
+			dev_err(dev, "failed to add OPP table: %d\n", err);
+			goto put_table;
+		}
+	}
+
+	err = devm_add_action(dev, sdhci_tegra_deinit_opp_table, dev);
+	if (err)
+		goto remove_table;
+
+	return 0;
+
+remove_table:
+	dev_pm_opp_of_remove_table(dev);
+put_table:
+	dev_pm_opp_put_regulators(opp_table);
+
+	return err;
+}
+
 static int sdhci_tegra_probe(struct platform_device *pdev)
 {
 	const struct of_device_id *match;
@@ -1621,6 +1681,10 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
 		goto err_power_req;
 	}
 
+	rc = devm_sdhci_tegra_init_opp_table(&pdev->dev);
+	if (rc)
+		goto err_parse_dt;
+
 	/*
 	 * Tegra210 has a separate SDMMC_LEGACY_TM clock used for host
 	 * timeout clock and SW can choose TMCLK or SDCLK for hardware
-- 
2.27.0


WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Alan Stern" <stern@rowland.harvard.edu>,
	"Peter Chen" <Peter.Chen@nxp.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Nicolas Chauvet" <kwizart@gmail.com>
Cc: devel@driverdev.osuosl.org, linux-pwm@vger.kernel.org,
	linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-usb@vger.kernel.org, linux-mmc@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-tegra@vger.kernel.org, linux-media@vger.kernel.org
Subject: [PATCH v1 17/30] mmc: sdhci-tegra: Support OPP and core voltage scaling
Date: Thu,  5 Nov 2020 02:44:14 +0300	[thread overview]
Message-ID: <20201104234427.26477-18-digetx@gmail.com> (raw)
In-Reply-To: <20201104234427.26477-1-digetx@gmail.com>

Add OPP and SoC core voltage scaling support to the Tegra SDHCI driver.
This is required for enabling system-wide DVFS on older Tegra SoCs.

Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/mmc/host/Kconfig       |  1 +
 drivers/mmc/host/sdhci-tegra.c | 70 ++++++++++++++++++++++++++++++++--
 2 files changed, 68 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 310e546e5898..7d719c81b917 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -293,6 +293,7 @@ config MMC_SDHCI_TEGRA
 	depends on MMC_SDHCI_PLTFM
 	select MMC_SDHCI_IO_ACCESSORS
 	select MMC_CQHCI
+	select PM_OPP
 	help
 	  This selects the Tegra SD/MMC controller. If you have a Tegra
 	  platform with SD or MMC devices, say Y or M here.
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index ed12aacb1c73..964709a3ccd6 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/pm_opp.h>
 #include <linux/pinctrl/consumer.h>
 #include <linux/regulator/consumer.h>
 #include <linux/reset.h>
@@ -754,10 +755,15 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
+	struct device *dev = mmc_dev(host->mmc);
 	unsigned long host_clk;
 
-	if (!clock)
-		return sdhci_set_clock(host, clock);
+	/* disable clock and then remove OPP performance/voltage vote */
+	if (!clock) {
+		sdhci_set_clock(host, clock);
+		dev_pm_opp_set_rate(dev, clock);
+		return;
+	}
 
 	/*
 	 * In DDR50/52 modes the Tegra SDHCI controllers require the SDHCI
@@ -772,7 +778,7 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	 * from clk_get_rate() is used.
 	 */
 	host_clk = tegra_host->ddr_signaling ? clock * 2 : clock;
-	clk_set_rate(pltfm_host->clk, host_clk);
+	dev_pm_opp_set_rate(dev, host_clk);
 	tegra_host->curr_clk_rate = host_clk;
 	if (tegra_host->ddr_signaling)
 		host->max_clk = host_clk;
@@ -1558,6 +1564,60 @@ static int sdhci_tegra_add_host(struct sdhci_host *host)
 	return ret;
 }
 
+static void sdhci_tegra_deinit_opp_table(void *data)
+{
+	struct device *dev = data;
+	struct opp_table *opp_table;
+
+	opp_table = dev_pm_opp_get_opp_table(dev);
+	dev_pm_opp_of_remove_table(dev);
+	dev_pm_opp_put_regulators(opp_table);
+	dev_pm_opp_put_opp_table(opp_table);
+}
+
+static int devm_sdhci_tegra_init_opp_table(struct device *dev)
+{
+	struct opp_table *opp_table;
+	const char *rname = "core";
+	int err;
+
+	/* voltage scaling is optional */
+	if (device_property_present(dev, "core-supply"))
+		opp_table = dev_pm_opp_set_regulators(dev, &rname, 1);
+	else
+		opp_table = dev_pm_opp_get_opp_table(dev);
+
+	if (IS_ERR(opp_table))
+		return dev_err_probe(dev, PTR_ERR(opp_table),
+				    "failed to prepare OPP table\n");
+
+	/*
+	 * OPP table presence is optional and we want the set_rate() of OPP
+	 * API to work similarly to clk_set_rate() if table is missing in a
+	 * device-tree.  The add_table() errors out if OPP is missing in DT.
+	 */
+	if (device_property_present(dev, "operating-points-v2")) {
+		err = dev_pm_opp_of_add_table(dev);
+		if (err) {
+			dev_err(dev, "failed to add OPP table: %d\n", err);
+			goto put_table;
+		}
+	}
+
+	err = devm_add_action(dev, sdhci_tegra_deinit_opp_table, dev);
+	if (err)
+		goto remove_table;
+
+	return 0;
+
+remove_table:
+	dev_pm_opp_of_remove_table(dev);
+put_table:
+	dev_pm_opp_put_regulators(opp_table);
+
+	return err;
+}
+
 static int sdhci_tegra_probe(struct platform_device *pdev)
 {
 	const struct of_device_id *match;
@@ -1621,6 +1681,10 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
 		goto err_power_req;
 	}
 
+	rc = devm_sdhci_tegra_init_opp_table(&pdev->dev);
+	if (rc)
+		goto err_parse_dt;
+
 	/*
 	 * Tegra210 has a separate SDMMC_LEGACY_TM clock used for host
 	 * timeout clock and SW can choose TMCLK or SDCLK for hardware
-- 
2.27.0

_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Alan Stern" <stern@rowland.harvard.edu>,
	"Peter Chen" <Peter.Chen@nxp.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Nicolas Chauvet" <kwizart@gmail.com>
Cc: devel@driverdev.osuosl.org, linux-pwm@vger.kernel.org,
	linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-usb@vger.kernel.org, linux-mmc@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-tegra@vger.kernel.org, linux-media@vger.kernel.org
Subject: [PATCH v1 17/30] mmc: sdhci-tegra: Support OPP and core voltage scaling
Date: Thu,  5 Nov 2020 02:44:14 +0300	[thread overview]
Message-ID: <20201104234427.26477-18-digetx@gmail.com> (raw)
In-Reply-To: <20201104234427.26477-1-digetx@gmail.com>

Add OPP and SoC core voltage scaling support to the Tegra SDHCI driver.
This is required for enabling system-wide DVFS on older Tegra SoCs.

Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/mmc/host/Kconfig       |  1 +
 drivers/mmc/host/sdhci-tegra.c | 70 ++++++++++++++++++++++++++++++++--
 2 files changed, 68 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 310e546e5898..7d719c81b917 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -293,6 +293,7 @@ config MMC_SDHCI_TEGRA
 	depends on MMC_SDHCI_PLTFM
 	select MMC_SDHCI_IO_ACCESSORS
 	select MMC_CQHCI
+	select PM_OPP
 	help
 	  This selects the Tegra SD/MMC controller. If you have a Tegra
 	  platform with SD or MMC devices, say Y or M here.
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index ed12aacb1c73..964709a3ccd6 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/pm_opp.h>
 #include <linux/pinctrl/consumer.h>
 #include <linux/regulator/consumer.h>
 #include <linux/reset.h>
@@ -754,10 +755,15 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
+	struct device *dev = mmc_dev(host->mmc);
 	unsigned long host_clk;
 
-	if (!clock)
-		return sdhci_set_clock(host, clock);
+	/* disable clock and then remove OPP performance/voltage vote */
+	if (!clock) {
+		sdhci_set_clock(host, clock);
+		dev_pm_opp_set_rate(dev, clock);
+		return;
+	}
 
 	/*
 	 * In DDR50/52 modes the Tegra SDHCI controllers require the SDHCI
@@ -772,7 +778,7 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	 * from clk_get_rate() is used.
 	 */
 	host_clk = tegra_host->ddr_signaling ? clock * 2 : clock;
-	clk_set_rate(pltfm_host->clk, host_clk);
+	dev_pm_opp_set_rate(dev, host_clk);
 	tegra_host->curr_clk_rate = host_clk;
 	if (tegra_host->ddr_signaling)
 		host->max_clk = host_clk;
@@ -1558,6 +1564,60 @@ static int sdhci_tegra_add_host(struct sdhci_host *host)
 	return ret;
 }
 
+static void sdhci_tegra_deinit_opp_table(void *data)
+{
+	struct device *dev = data;
+	struct opp_table *opp_table;
+
+	opp_table = dev_pm_opp_get_opp_table(dev);
+	dev_pm_opp_of_remove_table(dev);
+	dev_pm_opp_put_regulators(opp_table);
+	dev_pm_opp_put_opp_table(opp_table);
+}
+
+static int devm_sdhci_tegra_init_opp_table(struct device *dev)
+{
+	struct opp_table *opp_table;
+	const char *rname = "core";
+	int err;
+
+	/* voltage scaling is optional */
+	if (device_property_present(dev, "core-supply"))
+		opp_table = dev_pm_opp_set_regulators(dev, &rname, 1);
+	else
+		opp_table = dev_pm_opp_get_opp_table(dev);
+
+	if (IS_ERR(opp_table))
+		return dev_err_probe(dev, PTR_ERR(opp_table),
+				    "failed to prepare OPP table\n");
+
+	/*
+	 * OPP table presence is optional and we want the set_rate() of OPP
+	 * API to work similarly to clk_set_rate() if table is missing in a
+	 * device-tree.  The add_table() errors out if OPP is missing in DT.
+	 */
+	if (device_property_present(dev, "operating-points-v2")) {
+		err = dev_pm_opp_of_add_table(dev);
+		if (err) {
+			dev_err(dev, "failed to add OPP table: %d\n", err);
+			goto put_table;
+		}
+	}
+
+	err = devm_add_action(dev, sdhci_tegra_deinit_opp_table, dev);
+	if (err)
+		goto remove_table;
+
+	return 0;
+
+remove_table:
+	dev_pm_opp_of_remove_table(dev);
+put_table:
+	dev_pm_opp_put_regulators(opp_table);
+
+	return err;
+}
+
 static int sdhci_tegra_probe(struct platform_device *pdev)
 {
 	const struct of_device_id *match;
@@ -1621,6 +1681,10 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
 		goto err_power_req;
 	}
 
+	rc = devm_sdhci_tegra_init_opp_table(&pdev->dev);
+	if (rc)
+		goto err_parse_dt;
+
 	/*
 	 * Tegra210 has a separate SDMMC_LEGACY_TM clock used for host
 	 * timeout clock and SW can choose TMCLK or SDCLK for hardware
-- 
2.27.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2020-11-04 23:48 UTC|newest]

Thread overview: 325+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-04 23:43 [PATCH v1 00/30] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Dmitry Osipenko
2020-11-04 23:43 ` Dmitry Osipenko
2020-11-04 23:43 ` Dmitry Osipenko
2020-11-04 23:43 ` [PATCH v1 01/30] dt-bindings: host1x: Document OPP and voltage regulator properties Dmitry Osipenko
2020-11-04 23:43   ` Dmitry Osipenko
2020-11-04 23:43   ` Dmitry Osipenko
2020-11-09 18:57   ` Rob Herring
2020-11-09 18:57     ` Rob Herring
2020-11-09 18:57     ` Rob Herring
2020-11-11 11:45   ` Ulf Hansson
2020-11-11 11:45     ` Ulf Hansson
2020-11-11 11:45     ` Ulf Hansson
2020-11-04 23:43 ` [PATCH v1 02/30] dt-bindings: mmc: tegra: " Dmitry Osipenko
2020-11-04 23:43   ` Dmitry Osipenko
2020-11-04 23:43   ` Dmitry Osipenko
2020-11-09 18:58   ` Rob Herring
2020-11-09 18:58     ` Rob Herring
2020-11-09 18:58     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 03/30] dt-bindings: pwm: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-09 19:00   ` Rob Herring
2020-11-09 19:00     ` Rob Herring
2020-11-09 19:00     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 04/30] media: dt: bindings: tegra-vde: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-09 19:01   ` Rob Herring
2020-11-09 19:01     ` Rob Herring
2020-11-09 19:01     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 05/30] dt-binding: usb: ci-hdrc-usb2: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-09 19:01   ` Rob Herring
2020-11-09 19:01     ` Rob Herring
2020-11-09 19:01     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 06/30] dt-bindings: usb: tegra-ehci: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-09 19:01   ` Rob Herring
2020-11-09 19:01     ` Rob Herring
2020-11-09 19:01     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 07/30] soc/tegra: Add sync state API Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-10 20:47   ` Thierry Reding
2020-11-10 20:47     ` Thierry Reding
2020-11-10 20:47     ` Thierry Reding
2020-11-10 21:22     ` Dmitry Osipenko
2020-11-10 21:22       ` Dmitry Osipenko
2020-11-10 21:22       ` Dmitry Osipenko
2020-11-10 21:32       ` Dmitry Osipenko
2020-11-10 21:32         ` Dmitry Osipenko
2020-11-10 21:32         ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 08/30] soc/tegra: regulators: Support Tegra SoC device " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 09/30] soc/tegra: regulators: Fix lockup when voltage-spread is out of range Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 10/30] regulator: Allow skipping disabled regulators in regulator_check_consumers() Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 11/30] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-10 20:29   ` Thierry Reding
2020-11-10 20:29     ` Thierry Reding
2020-11-10 20:29     ` Thierry Reding
2020-11-10 20:32     ` Mark Brown
2020-11-10 20:32       ` Mark Brown
2020-11-10 20:32       ` Mark Brown
2020-11-10 21:23       ` Dmitry Osipenko
2020-11-10 21:23         ` Dmitry Osipenko
2020-11-10 21:23         ` Dmitry Osipenko
2020-11-11 11:55         ` Mark Brown
2020-11-11 11:55           ` Mark Brown
2020-11-11 11:55           ` Mark Brown
2020-11-12 16:59           ` Dmitry Osipenko
2020-11-12 16:59             ` Dmitry Osipenko
2020-11-12 16:59             ` Dmitry Osipenko
2020-11-12 17:16             ` Mark Brown
2020-11-12 17:16               ` Mark Brown
2020-11-12 17:16               ` Mark Brown
2020-11-12 19:16               ` Dmitry Osipenko
2020-11-12 19:16                 ` Dmitry Osipenko
2020-11-12 19:16                 ` Dmitry Osipenko
2020-11-12 20:01                 ` Mark Brown
2020-11-12 20:01                   ` Mark Brown
2020-11-12 20:01                   ` Mark Brown
2020-11-12 22:37                   ` Dmitry Osipenko
2020-11-12 22:37                     ` Dmitry Osipenko
2020-11-12 22:37                     ` Dmitry Osipenko
2020-11-13 14:29                     ` Mark Brown
2020-11-13 14:29                       ` Mark Brown
2020-11-13 14:29                       ` Mark Brown
2020-11-13 15:55                       ` Dmitry Osipenko
2020-11-13 15:55                         ` Dmitry Osipenko
2020-11-13 15:55                         ` Dmitry Osipenko
2020-11-13 16:15                         ` Mark Brown
2020-11-13 16:15                           ` Mark Brown
2020-11-13 16:15                           ` Mark Brown
2020-11-13 17:13                           ` Dmitry Osipenko
2020-11-13 17:13                             ` Dmitry Osipenko
2020-11-13 17:13                             ` Dmitry Osipenko
2020-11-13 17:28                             ` Mark Brown
2020-11-13 17:28                               ` Mark Brown
2020-11-13 17:28                               ` Mark Brown
2020-11-15 17:42                               ` Dmitry Osipenko
2020-11-15 17:42                                 ` Dmitry Osipenko
2020-11-15 17:42                                 ` Dmitry Osipenko
2020-11-16 13:33                                 ` Mark Brown
2020-11-16 13:33                                   ` Mark Brown
2020-11-16 13:33                                   ` Mark Brown
2020-11-19 14:22                                   ` Dmitry Osipenko
2020-11-19 14:22                                     ` Dmitry Osipenko
2020-11-19 14:22                                     ` Dmitry Osipenko
2020-11-19 15:19                                     ` Mark Brown
2020-11-19 15:19                                       ` Mark Brown
2020-11-19 15:19                                       ` Mark Brown
2020-11-13 17:30                             ` Thierry Reding
2020-11-13 17:30                               ` Thierry Reding
2020-11-13 17:30                               ` Thierry Reding
2020-11-10 21:17     ` Dmitry Osipenko
2020-11-10 21:17       ` Dmitry Osipenko
2020-11-10 21:17       ` Dmitry Osipenko
2020-11-10 21:50     ` Dmitry Osipenko
2020-11-10 21:50       ` Dmitry Osipenko
2020-11-10 21:50       ` Dmitry Osipenko
2020-11-11  9:28     ` Dan Carpenter
2020-11-11  9:28       ` Dan Carpenter
2020-11-11  9:28       ` Dan Carpenter
2020-11-04 23:44 ` [PATCH v1 12/30] drm/tegra: gr2d: Correct swapped device-tree compatibles Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 13/30] drm/tegra: gr2d: Support OPP and SoC core voltage scaling Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 14/30] drm/tegra: gr3d: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 15/30] drm/tegra: hdmi: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 16/30] gpu: host1x: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` Dmitry Osipenko [this message]
2020-11-04 23:44   ` [PATCH v1 17/30] mmc: sdhci-tegra: Support OPP and " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-05  9:58   ` Viresh Kumar
2020-11-05  9:58     ` Viresh Kumar
2020-11-05  9:58     ` Viresh Kumar
2020-11-05 14:18     ` Dmitry Osipenko
2020-11-05 14:18       ` Dmitry Osipenko
2020-11-05 14:18       ` Dmitry Osipenko
2020-11-06  6:15       ` Viresh Kumar
2020-11-06  6:15         ` Viresh Kumar
2020-11-06  6:15         ` Viresh Kumar
2020-11-06 13:17         ` Dmitry Osipenko
2020-11-06 13:17           ` Dmitry Osipenko
2020-11-06 13:41           ` Frank Lee
2020-11-06 13:41             ` Frank Lee
2020-11-09  5:00             ` Viresh Kumar
2020-11-09  5:00               ` Viresh Kumar
2020-11-09  5:00               ` Viresh Kumar
2020-11-09  5:08               ` Dmitry Osipenko
2020-11-09  5:08                 ` Dmitry Osipenko
2020-11-09  5:08                 ` Dmitry Osipenko
2020-11-09  5:10                 ` Viresh Kumar
2020-11-09  5:10                   ` Viresh Kumar
2020-11-09  5:10                   ` Viresh Kumar
2020-11-09  5:19                   ` Dmitry Osipenko
2020-11-09  5:19                     ` Dmitry Osipenko
2020-11-09  5:19                     ` Dmitry Osipenko
2020-11-09  5:35                     ` Viresh Kumar
2020-11-09  5:35                       ` Viresh Kumar
2020-11-09  5:35                       ` Viresh Kumar
2020-11-09  5:44                       ` Dmitry Osipenko
2020-11-09  5:44                         ` Dmitry Osipenko
2020-11-09  5:44                         ` Dmitry Osipenko
2020-11-09  5:53                         ` Viresh Kumar
2020-11-09  5:53                           ` Viresh Kumar
2020-11-09  5:53                           ` Viresh Kumar
2020-11-09 11:20                           ` Frank Lee
2020-11-09 11:20                             ` Frank Lee
2020-11-09 11:20                             ` Frank Lee
2020-12-22  8:54                             ` Viresh Kumar
2020-12-22  8:54                               ` Viresh Kumar
2020-12-22  8:54                               ` Viresh Kumar
2020-11-04 23:44 ` [PATCH v1 18/30] pwm: tegra: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-10 20:50   ` Thierry Reding
2020-11-10 20:50     ` Thierry Reding
2020-11-10 20:50     ` Thierry Reding
2020-11-10 21:17     ` Dmitry Osipenko
2020-11-10 21:17       ` Dmitry Osipenko
2020-11-10 21:17       ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 19/30] media: staging: tegra-vde: Support OPP and SoC " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 20/30] usb: chipidea: tegra: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 21/30] usb: host: ehci-tegra: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-05 16:07   ` Alan Stern
2020-11-05 16:07     ` Alan Stern
2020-11-05 16:07     ` Alan Stern
2020-11-05 17:54     ` Dmitry Osipenko
2020-11-05 17:54       ` Dmitry Osipenko
2020-11-05 17:54       ` Dmitry Osipenko
2020-11-05 18:02     ` Dmitry Osipenko
2020-11-05 18:02       ` Dmitry Osipenko
2020-11-05 18:02       ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 22/30] memory: tegra20-emc: Support Tegra SoC device state syncing Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 23/30] memory: tegra30-emc: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 24/30] ARM: tegra: Add OPP tables for Tegra20 peripheral devices Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 25/30] ARM: tegra: Add OPP tables for Tegra30 " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 26/30] ARM: tegra: ventana: Add voltage supplies to DVFS-capable devices Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 27/30] ARM: tegra: paz00: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 28/30] ARM: tegra: acer-a500: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 29/30] ARM: tegra: cardhu-a04: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 30/30] ARM: tegra: nexus7: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-05  1:45 ` [PATCH v1 00/30] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Michał Mirosław
2020-11-05  1:45   ` Michał Mirosław
2020-11-05  1:45   ` Michał Mirosław
2020-11-05 13:57   ` Dmitry Osipenko
2020-11-05 13:57     ` Dmitry Osipenko
2020-11-05 13:57     ` Dmitry Osipenko
2020-11-05  9:45 ` Ulf Hansson
2020-11-05  9:45   ` Ulf Hansson
2020-11-05  9:45   ` Ulf Hansson
2020-11-05 10:06   ` Viresh Kumar
2020-11-05 10:06     ` Viresh Kumar
2020-11-05 10:06     ` Viresh Kumar
2020-11-05 10:34     ` Ulf Hansson
2020-11-05 10:34       ` Ulf Hansson
2020-11-05 10:34       ` Ulf Hansson
2020-11-05 10:40       ` Viresh Kumar
2020-11-05 10:40         ` Viresh Kumar
2020-11-05 10:40         ` Viresh Kumar
2020-11-05 10:56         ` Ulf Hansson
2020-11-05 10:56           ` Ulf Hansson
2020-11-05 10:56           ` Ulf Hansson
2020-11-05 11:13           ` Viresh Kumar
2020-11-05 11:13             ` Viresh Kumar
2020-11-05 11:13             ` Viresh Kumar
2020-11-05 12:52             ` Ulf Hansson
2020-11-05 12:52               ` Ulf Hansson
2020-11-05 12:52               ` Ulf Hansson
2020-11-05 15:22   ` Dmitry Osipenko
2020-11-05 15:22     ` Dmitry Osipenko
2020-11-05 15:22     ` Dmitry Osipenko
2020-11-08 12:19     ` Dmitry Osipenko
2020-11-08 12:19       ` Dmitry Osipenko
2020-11-08 12:19       ` Dmitry Osipenko
2020-11-09  4:43       ` Viresh Kumar
2020-11-09  4:43         ` Viresh Kumar
2020-11-09  4:43         ` Viresh Kumar
2020-11-09  4:47         ` Dmitry Osipenko
2020-11-09  4:47           ` Dmitry Osipenko
2020-11-09  4:47           ` Dmitry Osipenko
2020-11-09  5:10           ` Dmitry Osipenko
2020-11-09  5:10             ` Dmitry Osipenko
2020-11-09  5:10             ` Dmitry Osipenko
2020-11-09  5:12             ` Viresh Kumar
2020-11-09  5:12               ` Viresh Kumar
2020-11-09  5:12               ` Viresh Kumar
2020-11-11 11:38       ` Ulf Hansson
2020-11-11 11:38         ` Ulf Hansson
2020-11-11 11:38         ` Ulf Hansson
2020-11-12 19:57         ` Dmitry Osipenko
2020-11-12 19:57           ` Dmitry Osipenko
2020-11-12 19:57           ` Dmitry Osipenko
2020-11-12 20:43           ` Thierry Reding
2020-11-12 20:43             ` Thierry Reding
2020-11-12 20:43             ` Thierry Reding
2020-11-12 22:14             ` Dmitry Osipenko
2020-11-12 22:14               ` Dmitry Osipenko
2020-11-12 22:14               ` Dmitry Osipenko
2020-11-13 14:45               ` Ulf Hansson
2020-11-13 14:45                 ` Ulf Hansson
2020-11-13 14:45                 ` Ulf Hansson
2020-11-13 16:00                 ` Dmitry Osipenko
2020-11-13 16:00                   ` Dmitry Osipenko
2020-11-13 16:00                   ` Dmitry Osipenko
2020-11-13 16:35               ` Thierry Reding
2020-11-13 16:35                 ` Thierry Reding
2020-11-13 16:35                 ` Thierry Reding
2020-11-15 16:29                 ` Dmitry Osipenko
2020-11-15 16:29                   ` Dmitry Osipenko
2020-11-15 16:29                   ` Dmitry Osipenko
2020-12-01 13:57 ` Mark Brown
2020-12-01 13:57   ` Mark Brown
2020-12-01 13:57   ` Mark Brown
2020-12-01 14:17   ` Dmitry Osipenko
2020-12-01 14:17     ` Dmitry Osipenko
2020-12-01 14:17     ` Dmitry Osipenko
2020-12-01 14:34     ` Mark Brown
2020-12-01 14:34       ` Mark Brown
2020-12-01 14:34       ` Mark Brown
2020-12-01 14:44       ` Dmitry Osipenko
2020-12-01 14:44         ` Dmitry Osipenko
2020-12-01 14:44         ` Dmitry Osipenko

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