From: Rob Herring <robh@kernel.org> To: unlisted-recipients:; (no To-header on input) Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Bjorn Helgaas <bhelgaas@google.com> Subject: [PATCH v2 02/16] PCI: dwc/intel-gw: Move ATU offset out of driver match data Date: Thu, 5 Nov 2020 15:11:45 -0600 [thread overview] Message-ID: <20201105211159.1814485-3-robh@kernel.org> (raw) In-Reply-To: <20201105211159.1814485-1-robh@kernel.org> The ATU offset should be a register range in DT called 'atu', not driver match data. Any future platforms with a different ATU offset should add it to their DT. This is also in preparation to do DBI resource setup in the core DWC code, so let's move setting atu_base later in intel_pcie_rc_setup(). Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rob Herring <robh@kernel.org> --- drivers/pci/controller/dwc/pcie-intel-gw.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c index 5650cb78acba..77ef88333115 100644 --- a/drivers/pci/controller/dwc/pcie-intel-gw.c +++ b/drivers/pci/controller/dwc/pcie-intel-gw.c @@ -58,7 +58,6 @@ struct intel_pcie_soc { unsigned int pcie_ver; - unsigned int pcie_atu_offset; u32 num_viewport; }; @@ -155,11 +154,15 @@ static void intel_pcie_init_n_fts(struct dw_pcie *pci) static void intel_pcie_rc_setup(struct intel_pcie_port *lpp) { + struct dw_pcie *pci = &lpp->pci; + + pci->atu_base = pci->dbi_base + 0xC0000; + intel_pcie_ltssm_disable(lpp); intel_pcie_link_setup(lpp); - intel_pcie_init_n_fts(&lpp->pci); - dw_pcie_setup_rc(&lpp->pci.pp); - dw_pcie_upconfig_setup(&lpp->pci); + intel_pcie_init_n_fts(pci); + dw_pcie_setup_rc(&pci->pp); + dw_pcie_upconfig_setup(pci); } static int intel_pcie_ep_rst_init(struct intel_pcie_port *lpp) @@ -425,7 +428,6 @@ static const struct dw_pcie_host_ops intel_pcie_dw_ops = { static const struct intel_pcie_soc pcie_data = { .pcie_ver = 0x520A, - .pcie_atu_offset = 0xC0000, .num_viewport = 3, }; @@ -461,7 +463,6 @@ static int intel_pcie_probe(struct platform_device *pdev) pci->ops = &intel_pcie_ops; pci->version = data->pcie_ver; - pci->atu_base = pci->dbi_base + data->pcie_atu_offset; pp->ops = &intel_pcie_dw_ops; ret = dw_pcie_host_init(pp); -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org> Cc: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 02/16] PCI: dwc/intel-gw: Move ATU offset out of driver match data Date: Thu, 5 Nov 2020 15:11:45 -0600 [thread overview] Message-ID: <20201105211159.1814485-3-robh@kernel.org> (raw) In-Reply-To: <20201105211159.1814485-1-robh@kernel.org> The ATU offset should be a register range in DT called 'atu', not driver match data. Any future platforms with a different ATU offset should add it to their DT. This is also in preparation to do DBI resource setup in the core DWC code, so let's move setting atu_base later in intel_pcie_rc_setup(). Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rob Herring <robh@kernel.org> --- drivers/pci/controller/dwc/pcie-intel-gw.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c index 5650cb78acba..77ef88333115 100644 --- a/drivers/pci/controller/dwc/pcie-intel-gw.c +++ b/drivers/pci/controller/dwc/pcie-intel-gw.c @@ -58,7 +58,6 @@ struct intel_pcie_soc { unsigned int pcie_ver; - unsigned int pcie_atu_offset; u32 num_viewport; }; @@ -155,11 +154,15 @@ static void intel_pcie_init_n_fts(struct dw_pcie *pci) static void intel_pcie_rc_setup(struct intel_pcie_port *lpp) { + struct dw_pcie *pci = &lpp->pci; + + pci->atu_base = pci->dbi_base + 0xC0000; + intel_pcie_ltssm_disable(lpp); intel_pcie_link_setup(lpp); - intel_pcie_init_n_fts(&lpp->pci); - dw_pcie_setup_rc(&lpp->pci.pp); - dw_pcie_upconfig_setup(&lpp->pci); + intel_pcie_init_n_fts(pci); + dw_pcie_setup_rc(&pci->pp); + dw_pcie_upconfig_setup(pci); } static int intel_pcie_ep_rst_init(struct intel_pcie_port *lpp) @@ -425,7 +428,6 @@ static const struct dw_pcie_host_ops intel_pcie_dw_ops = { static const struct intel_pcie_soc pcie_data = { .pcie_ver = 0x520A, - .pcie_atu_offset = 0xC0000, .num_viewport = 3, }; @@ -461,7 +463,6 @@ static int intel_pcie_probe(struct platform_device *pdev) pci->ops = &intel_pcie_ops; pci->version = data->pcie_ver; - pci->atu_base = pci->dbi_base + data->pcie_atu_offset; pp->ops = &intel_pcie_dw_ops; ret = dw_pcie_host_init(pp); -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-11-05 21:12 UTC|newest] Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <CGME20201105211208eucas1p29087cdd73805e670aff9f3a43f644e05@eucas1p2.samsung.com> 2020-11-05 21:11 ` [PATCH v2 00/16] PCI: dwc: Another round of clean-ups Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 01/16] PCI: dwc: Support multiple ATU memory regions Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring [this message] 2020-11-05 21:11 ` [PATCH v2 02/16] PCI: dwc/intel-gw: Move ATU offset out of driver match data Rob Herring 2020-11-05 21:11 ` [PATCH v2 03/16] PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 04/16] PCI: dwc/intel-gw: Remove some unneeded function wrappers Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 05/16] PCI: dwc: Ensure all outbound ATU windows are reset Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 06/16] PCI: dwc/dra7xx: Use the common MSI irq_chip Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 07/16] PCI: dwc: Drop the .set_num_vectors() host op Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 08/16] PCI: dwc: Move MSI interrupt setup into DWC common code Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 09/16] PCI: dwc: Rework MSI initialization Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-09 2:53 ` Jisheng Zhang 2020-11-09 2:53 ` Jisheng Zhang 2020-11-09 2:53 ` Jisheng Zhang 2020-11-05 21:11 ` [PATCH v2 10/16] PCI: dwc: Move link handling into common code Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 11/16] PCI: dwc: Move dw_pcie_msi_init() into core Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 12/16] PCI: dwc: Move dw_pcie_setup_rc() to DWC common code Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 13/16] PCI: dwc: Remove unnecessary wrappers around dw_pcie_host_init() Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 14/16] Revert "PCI: dwc/keystone: Drop duplicated 'num-viewport'" Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 15/16] PCI: dwc: Move inbound and outbound windows to common struct Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-05 21:11 ` [PATCH v2 16/16] PCI: dwc: Detect number of iATU windows Rob Herring 2020-11-05 21:11 ` Rob Herring 2020-11-06 9:17 ` [PATCH v2 00/16] PCI: dwc: Another round of clean-ups Marek Szyprowski 2020-11-06 9:17 ` Marek Szyprowski 2020-11-06 9:17 ` Marek Szyprowski 2020-11-06 9:17 ` Marek Szyprowski 2020-11-19 11:01 ` Lorenzo Pieralisi 2020-11-19 11:01 ` Lorenzo Pieralisi 2020-11-19 11:01 ` Lorenzo Pieralisi 2020-11-19 11:01 ` Lorenzo Pieralisi
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20201105211159.1814485-3-robh@kernel.org \ --to=robh@kernel.org \ --cc=bhelgaas@google.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-pci@vger.kernel.org \ --cc=lorenzo.pieralisi@arm.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.