All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 3/6] drm/i915: Pimp the watermark documentation a bit
Date: Fri,  6 Nov 2020 19:30:39 +0200	[thread overview]
Message-ID: <20201106173042.7534-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20201106173042.7534-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Document what each of the "raw" vs. "optimal" vs. "intermediate"
watermarks do.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../drm/i915/display/intel_display_types.h    | 48 ++++++++++---------
 1 file changed, 25 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 6b249969c394..b977e70e34d7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -737,25 +737,34 @@ struct g4x_wm_state {
 
 struct intel_crtc_wm_state {
 	union {
+		/*
+		 * raw:
+		 * The "raw" watermark values produced by the formula
+		 * given the plane's current state. They do not consider
+		 * how much FIFO is actually allocated for each plane.
+		 *
+		 * optimal:
+		 * The "optimal" watermark values given the current
+		 * state of the planes and the amount of FIFO
+		 * allocated to each, ignoring any previous state
+		 * of the planes.
+		 *
+		 * intermediate:
+		 * The "intermediate" watermark values when transitioning
+		 * between the old and new "optimal" values. Used when
+		 * the watermark registers are single buffered and hence
+		 * their state changes asynchronously with regards to the
+		 * actual plane registers. These are essentially the
+		 * worst case combination of the old and new "optimal"
+		 * watermarks, which are therefore safe to use when the
+		 * plane is in either its old or new state.
+		 */
 		struct {
-			/*
-			 * Intermediate watermarks; these can be
-			 * programmed immediately since they satisfy
-			 * both the current configuration we're
-			 * switching away from and the new
-			 * configuration we're switching to.
-			 */
 			struct intel_pipe_wm intermediate;
-
-			/*
-			 * Optimal watermarks, programmed post-vblank
-			 * when this state is committed.
-			 */
 			struct intel_pipe_wm optimal;
 		} ilk;
 
 		struct {
-			/* "raw" watermarks */
 			struct skl_pipe_wm raw;
 			/* gen9+ only needs 1-step wm programming */
 			struct skl_pipe_wm optimal;
@@ -765,22 +774,15 @@ struct intel_crtc_wm_state {
 		} skl;
 
 		struct {
-			/* "raw" watermarks (not inverted) */
-			struct g4x_pipe_wm raw[NUM_VLV_WM_LEVELS];
-			/* intermediate watermarks (inverted) */
-			struct vlv_wm_state intermediate;
-			/* optimal watermarks (inverted) */
-			struct vlv_wm_state optimal;
-			/* display FIFO split */
+			struct g4x_pipe_wm raw[NUM_VLV_WM_LEVELS]; /* not inverted */
+			struct vlv_wm_state intermediate; /* inverted */
+			struct vlv_wm_state optimal; /* inverted */
 			struct vlv_fifo_state fifo_state;
 		} vlv;
 
 		struct {
-			/* "raw" watermarks */
 			struct g4x_pipe_wm raw[NUM_G4X_WM_LEVELS];
-			/* intermediate watermarks */
 			struct g4x_wm_state intermediate;
-			/* optimal watermarks */
 			struct g4x_wm_state optimal;
 		} g4x;
 	};
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-11-06 17:30 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-06 17:30 [Intel-gfx] [PATCH 0/6] drm/i915: Eliminate intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
2020-11-06 17:30 ` [Intel-gfx] [PATCH 1/6] drm/i915: Pass intel_atomic_state around Ville Syrjala
2020-11-09 21:47   ` Navare, Manasi
2020-11-06 17:30 ` [Intel-gfx] [PATCH 2/6] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Ville Syrjala
2020-11-11 22:22   ` Lisovskiy, Stanislav
2020-11-06 17:30 ` Ville Syrjala [this message]
2020-11-11 22:51   ` [Intel-gfx] [PATCH 3/6] drm/i915: Pimp the watermark documentation a bit Navare, Manasi
2020-11-06 17:30 ` [Intel-gfx] [PATCH 4/6] drm/i915: Precompute can_sagv for each wm level Ville Syrjala
2020-11-12 13:59   ` Lisovskiy, Stanislav
2020-11-13 14:55     ` Ville Syrjälä
2020-11-06 17:30 ` [Intel-gfx] [PATCH 5/6] drm/i915: Store plane relative data rate in crtc_state Ville Syrjala
2020-11-13 15:26   ` Lisovskiy, Stanislav
2020-11-06 17:30 ` [Intel-gfx] [PATCH 6/6] drm/i915: Remove skl_adjusted_plane_pixel_rate() Ville Syrjala
2020-11-13 15:24   ` Lisovskiy, Stanislav
2020-11-06 18:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Eliminate intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code Patchwork
2020-11-06 18:34 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-11-13 21:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Eliminate intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code (rev2) Patchwork
2020-11-13 22:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-14  2:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201106173042.7534-4-ville.syrjala@linux.intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.