From: Nick Desaulniers <ndesaulniers@google.com> To: Ard Biesheuvel <ardb@kernel.org> Cc: Nick Desaulniers <ndesaulniers@google.com>, Jian Cai <jiancai@google.com>, Russell King <linux@armlinux.org.uk>, Nathan Chancellor <natechancellor@gmail.com>, Nicolas Pitre <nico@fluxnic.net>, Linus Walleij <linus.walleij@linaro.org>, Geert Uytterhoeven <geert+renesas@glider.be>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, clang-built-linux@googlegroups.com Subject: [PATCH] ARM: decompressor: avoid ADRL pseudo-instruction Date: Mon, 9 Nov 2020 12:51:54 -0800 [thread overview] Message-ID: <20201109205155.1207545-1-ndesaulniers@google.com> (raw) As Ard notes in commit 54781938ec34 ("crypto: arm/sha256-neon - avoid ADRL pseudo instruction") commit 0f5e8323777b ("crypto: arm/sha512-neon - avoid ADRL pseudo instruction") The ADRL pseudo instruction is not an architectural construct, but a convenience macro that was supported by the ARM proprietary assembler and adopted by binutils GAS as well, but only when assembling in 32-bit ARM mode. Therefore, it can only be used in assembler code that is known to assemble in ARM mode only, but as it turns out, the Clang assembler does not implement ADRL at all, and so it is better to get rid of it entirely. So replace the ADRL instruction with a ADR instruction that refers to a nearer symbol, and apply the delta explicitly using an additional instruction. We can use the same technique to generate the same offset. It looks like the ADRL pseudo instruction assembles to two SUB instructions in this case. Because the largest immediate operand that can be specified for this instruction is 0x400, and the distance between the reference and the symbol are larger than that, we need to use an intermediary symbol (cache_off in this case) to calculate the full range. Suggested-by: Ard Biesheuvel <ardb@kernel.org> Suggested-by: Jian Cai <jiancai@google.com> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> --- arch/arm/boot/compressed/head.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 2e04ec5b5446..b3eac6f9a709 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -1440,7 +1440,9 @@ ENTRY(efi_enter_kernel) mov r4, r0 @ preserve image base mov r8, r1 @ preserve DT pointer - ARM( adrl r0, call_cache_fn ) + ARM( sub r0, pc, #.L__efi_enter_kernel-cache_off ) + ARM( sub r0, r0, #cache_off-call_cache_fn ) +.L__efi_enter_kernel: THUMB( adr r0, call_cache_fn ) adr r1, 0f @ clean the region of code we bl cache_clean_flush @ may run with the MMU off -- 2.29.2.222.g5d2a92d10f8-goog
WARNING: multiple messages have this Message-ID (diff)
From: Nick Desaulniers <ndesaulniers@google.com> To: Ard Biesheuvel <ardb@kernel.org> Cc: Geert Uytterhoeven <geert+renesas@glider.be>, Nicolas Pitre <nico@fluxnic.net>, linux-kernel@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>, Nick Desaulniers <ndesaulniers@google.com>, Russell King <linux@armlinux.org.uk>, Jian Cai <jiancai@google.com>, clang-built-linux@googlegroups.com, Nathan Chancellor <natechancellor@gmail.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: decompressor: avoid ADRL pseudo-instruction Date: Mon, 9 Nov 2020 12:51:54 -0800 [thread overview] Message-ID: <20201109205155.1207545-1-ndesaulniers@google.com> (raw) As Ard notes in commit 54781938ec34 ("crypto: arm/sha256-neon - avoid ADRL pseudo instruction") commit 0f5e8323777b ("crypto: arm/sha512-neon - avoid ADRL pseudo instruction") The ADRL pseudo instruction is not an architectural construct, but a convenience macro that was supported by the ARM proprietary assembler and adopted by binutils GAS as well, but only when assembling in 32-bit ARM mode. Therefore, it can only be used in assembler code that is known to assemble in ARM mode only, but as it turns out, the Clang assembler does not implement ADRL at all, and so it is better to get rid of it entirely. So replace the ADRL instruction with a ADR instruction that refers to a nearer symbol, and apply the delta explicitly using an additional instruction. We can use the same technique to generate the same offset. It looks like the ADRL pseudo instruction assembles to two SUB instructions in this case. Because the largest immediate operand that can be specified for this instruction is 0x400, and the distance between the reference and the symbol are larger than that, we need to use an intermediary symbol (cache_off in this case) to calculate the full range. Suggested-by: Ard Biesheuvel <ardb@kernel.org> Suggested-by: Jian Cai <jiancai@google.com> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> --- arch/arm/boot/compressed/head.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 2e04ec5b5446..b3eac6f9a709 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -1440,7 +1440,9 @@ ENTRY(efi_enter_kernel) mov r4, r0 @ preserve image base mov r8, r1 @ preserve DT pointer - ARM( adrl r0, call_cache_fn ) + ARM( sub r0, pc, #.L__efi_enter_kernel-cache_off ) + ARM( sub r0, r0, #cache_off-call_cache_fn ) +.L__efi_enter_kernel: THUMB( adr r0, call_cache_fn ) adr r1, 0f @ clean the region of code we bl cache_clean_flush @ may run with the MMU off -- 2.29.2.222.g5d2a92d10f8-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2020-11-09 20:52 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-09 20:51 Nick Desaulniers [this message] 2020-11-09 20:51 ` [PATCH] ARM: decompressor: avoid ADRL pseudo-instruction Nick Desaulniers 2020-11-09 20:53 ` Ard Biesheuvel 2020-11-09 20:53 ` Ard Biesheuvel 2020-11-09 21:09 ` Nick Desaulniers 2020-11-09 21:09 ` Nick Desaulniers 2020-11-09 21:45 ` Ard Biesheuvel 2020-11-09 21:45 ` Ard Biesheuvel 2020-11-10 19:33 ` Nick Desaulniers 2020-11-10 19:33 ` Nick Desaulniers
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