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From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>, <yong.wu@mediatek.com>,
	<youlin.pei@mediatek.com>,
	Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
	<chao.hao@mediatek.com>, Greg Kroah-Hartman <gregkh@google.com>,
	<kernel-team@android.com>
Subject: [PATCH v4 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek
Date: Wed, 11 Nov 2020 20:38:25 +0800	[thread overview]
Message-ID: <20201111123838.15682-12-yong.wu@mediatek.com> (raw)
In-Reply-To: <20201111123838.15682-1-yong.wu@mediatek.com>

The standard input iova bits is 32. MediaTek quad the lvl1 pagetable
(4 * lvl1). No change for lvl2 pagetable. Then the iova bits can reach
34bit.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/io-pgtable-arm-v7s.c | 7 ++++---
 drivers/iommu/mtk_iommu.c          | 2 +-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c
index 0b3c5b904ddc..5601dc8bf810 100644
--- a/drivers/iommu/io-pgtable-arm-v7s.c
+++ b/drivers/iommu/io-pgtable-arm-v7s.c
@@ -45,9 +45,10 @@
 /*
  * We have 32 bits total; 12 bits resolved at level 1, 8 bits at level 2,
  * and 12 bits in a page.
+ * MediaTek extend 2 bits to reach 34bits, 14 bits at lvl1 and 8 bits at lvl2.
  */
 #define ARM_V7S_ADDR_BITS		32
-#define _ARM_V7S_LVL_BITS(lvl, cfg)	((lvl) == 1 ? 12 : 8)
+#define _ARM_V7S_LVL_BITS(lvl, cfg)	((lvl) == 1 ? ((cfg)->ias - 20) : 8)
 #define ARM_V7S_LVL_SHIFT(lvl)		((lvl) == 1 ? 20 : 12)
 #define ARM_V7S_TABLE_SHIFT		10
 
@@ -61,7 +62,7 @@
 #define _ARM_V7S_IDX_MASK(lvl, cfg)	(ARM_V7S_PTES_PER_LVL(lvl, cfg) - 1)
 #define ARM_V7S_LVL_IDX(addr, lvl, cfg)	({				\
 	int _l = lvl;							\
-	((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \
+	((addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \
 })
 
 /*
@@ -754,7 +755,7 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg,
 {
 	struct arm_v7s_io_pgtable *data;
 
-	if (cfg->ias > ARM_V7S_ADDR_BITS)
+	if (cfg->ias > (arm_v7s_is_mtk_enabled(cfg) ? 34 : ARM_V7S_ADDR_BITS))
 		return NULL;
 
 	if (cfg->oas > (arm_v7s_is_mtk_enabled(cfg) ? 35 : ARM_V7S_ADDR_BITS))
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index ec3c87d4b172..55f9b329e637 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -319,7 +319,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom)
 			IO_PGTABLE_QUIRK_TLBI_ON_MAP |
 			IO_PGTABLE_QUIRK_ARM_MTK_EXT,
 		.pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap,
-		.ias = 32,
+		.ias = 34,
 		.oas = 35,
 		.tlb = &mtk_iommu_flush_ops,
 		.iommu_dev = data->dev,
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	 Rob Herring <robh+dt@kernel.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	kernel-team@android.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org,
	Krzysztof Kozlowski <krzk@kernel.org>,
	anan.sun@mediatek.com, Greg Kroah-Hartman <gregkh@google.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek
Date: Wed, 11 Nov 2020 20:38:25 +0800	[thread overview]
Message-ID: <20201111123838.15682-12-yong.wu@mediatek.com> (raw)
In-Reply-To: <20201111123838.15682-1-yong.wu@mediatek.com>

The standard input iova bits is 32. MediaTek quad the lvl1 pagetable
(4 * lvl1). No change for lvl2 pagetable. Then the iova bits can reach
34bit.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/io-pgtable-arm-v7s.c | 7 ++++---
 drivers/iommu/mtk_iommu.c          | 2 +-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c
index 0b3c5b904ddc..5601dc8bf810 100644
--- a/drivers/iommu/io-pgtable-arm-v7s.c
+++ b/drivers/iommu/io-pgtable-arm-v7s.c
@@ -45,9 +45,10 @@
 /*
  * We have 32 bits total; 12 bits resolved at level 1, 8 bits at level 2,
  * and 12 bits in a page.
+ * MediaTek extend 2 bits to reach 34bits, 14 bits at lvl1 and 8 bits at lvl2.
  */
 #define ARM_V7S_ADDR_BITS		32
-#define _ARM_V7S_LVL_BITS(lvl, cfg)	((lvl) == 1 ? 12 : 8)
+#define _ARM_V7S_LVL_BITS(lvl, cfg)	((lvl) == 1 ? ((cfg)->ias - 20) : 8)
 #define ARM_V7S_LVL_SHIFT(lvl)		((lvl) == 1 ? 20 : 12)
 #define ARM_V7S_TABLE_SHIFT		10
 
@@ -61,7 +62,7 @@
 #define _ARM_V7S_IDX_MASK(lvl, cfg)	(ARM_V7S_PTES_PER_LVL(lvl, cfg) - 1)
 #define ARM_V7S_LVL_IDX(addr, lvl, cfg)	({				\
 	int _l = lvl;							\
-	((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \
+	((addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \
 })
 
 /*
@@ -754,7 +755,7 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg,
 {
 	struct arm_v7s_io_pgtable *data;
 
-	if (cfg->ias > ARM_V7S_ADDR_BITS)
+	if (cfg->ias > (arm_v7s_is_mtk_enabled(cfg) ? 34 : ARM_V7S_ADDR_BITS))
 		return NULL;
 
 	if (cfg->oas > (arm_v7s_is_mtk_enabled(cfg) ? 35 : ARM_V7S_ADDR_BITS))
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index ec3c87d4b172..55f9b329e637 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -319,7 +319,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom)
 			IO_PGTABLE_QUIRK_TLBI_ON_MAP |
 			IO_PGTABLE_QUIRK_ARM_MTK_EXT,
 		.pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap,
-		.ias = 32,
+		.ias = 34,
 		.oas = 35,
 		.tlb = &mtk_iommu_flush_ops,
 		.iommu_dev = data->dev,
-- 
2.18.0

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	 Rob Herring <robh+dt@kernel.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	kernel-team@android.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>,
	yong.wu@mediatek.com, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org,
	Krzysztof Kozlowski <krzk@kernel.org>,
	anan.sun@mediatek.com, Greg Kroah-Hartman <gregkh@google.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek
Date: Wed, 11 Nov 2020 20:38:25 +0800	[thread overview]
Message-ID: <20201111123838.15682-12-yong.wu@mediatek.com> (raw)
In-Reply-To: <20201111123838.15682-1-yong.wu@mediatek.com>

The standard input iova bits is 32. MediaTek quad the lvl1 pagetable
(4 * lvl1). No change for lvl2 pagetable. Then the iova bits can reach
34bit.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/io-pgtable-arm-v7s.c | 7 ++++---
 drivers/iommu/mtk_iommu.c          | 2 +-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c
index 0b3c5b904ddc..5601dc8bf810 100644
--- a/drivers/iommu/io-pgtable-arm-v7s.c
+++ b/drivers/iommu/io-pgtable-arm-v7s.c
@@ -45,9 +45,10 @@
 /*
  * We have 32 bits total; 12 bits resolved at level 1, 8 bits at level 2,
  * and 12 bits in a page.
+ * MediaTek extend 2 bits to reach 34bits, 14 bits at lvl1 and 8 bits at lvl2.
  */
 #define ARM_V7S_ADDR_BITS		32
-#define _ARM_V7S_LVL_BITS(lvl, cfg)	((lvl) == 1 ? 12 : 8)
+#define _ARM_V7S_LVL_BITS(lvl, cfg)	((lvl) == 1 ? ((cfg)->ias - 20) : 8)
 #define ARM_V7S_LVL_SHIFT(lvl)		((lvl) == 1 ? 20 : 12)
 #define ARM_V7S_TABLE_SHIFT		10
 
@@ -61,7 +62,7 @@
 #define _ARM_V7S_IDX_MASK(lvl, cfg)	(ARM_V7S_PTES_PER_LVL(lvl, cfg) - 1)
 #define ARM_V7S_LVL_IDX(addr, lvl, cfg)	({				\
 	int _l = lvl;							\
-	((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \
+	((addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \
 })
 
 /*
@@ -754,7 +755,7 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg,
 {
 	struct arm_v7s_io_pgtable *data;
 
-	if (cfg->ias > ARM_V7S_ADDR_BITS)
+	if (cfg->ias > (arm_v7s_is_mtk_enabled(cfg) ? 34 : ARM_V7S_ADDR_BITS))
 		return NULL;
 
 	if (cfg->oas > (arm_v7s_is_mtk_enabled(cfg) ? 35 : ARM_V7S_ADDR_BITS))
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index ec3c87d4b172..55f9b329e637 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -319,7 +319,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom)
 			IO_PGTABLE_QUIRK_TLBI_ON_MAP |
 			IO_PGTABLE_QUIRK_ARM_MTK_EXT,
 		.pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap,
-		.ias = 32,
+		.ias = 34,
 		.oas = 35,
 		.tlb = &mtk_iommu_flush_ops,
 		.iommu_dev = data->dev,
-- 
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	 Rob Herring <robh+dt@kernel.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	kernel-team@android.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>,
	yong.wu@mediatek.com, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org,
	Krzysztof Kozlowski <krzk@kernel.org>,
	anan.sun@mediatek.com, Greg Kroah-Hartman <gregkh@google.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek
Date: Wed, 11 Nov 2020 20:38:25 +0800	[thread overview]
Message-ID: <20201111123838.15682-12-yong.wu@mediatek.com> (raw)
In-Reply-To: <20201111123838.15682-1-yong.wu@mediatek.com>

The standard input iova bits is 32. MediaTek quad the lvl1 pagetable
(4 * lvl1). No change for lvl2 pagetable. Then the iova bits can reach
34bit.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/io-pgtable-arm-v7s.c | 7 ++++---
 drivers/iommu/mtk_iommu.c          | 2 +-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c
index 0b3c5b904ddc..5601dc8bf810 100644
--- a/drivers/iommu/io-pgtable-arm-v7s.c
+++ b/drivers/iommu/io-pgtable-arm-v7s.c
@@ -45,9 +45,10 @@
 /*
  * We have 32 bits total; 12 bits resolved at level 1, 8 bits at level 2,
  * and 12 bits in a page.
+ * MediaTek extend 2 bits to reach 34bits, 14 bits at lvl1 and 8 bits at lvl2.
  */
 #define ARM_V7S_ADDR_BITS		32
-#define _ARM_V7S_LVL_BITS(lvl, cfg)	((lvl) == 1 ? 12 : 8)
+#define _ARM_V7S_LVL_BITS(lvl, cfg)	((lvl) == 1 ? ((cfg)->ias - 20) : 8)
 #define ARM_V7S_LVL_SHIFT(lvl)		((lvl) == 1 ? 20 : 12)
 #define ARM_V7S_TABLE_SHIFT		10
 
@@ -61,7 +62,7 @@
 #define _ARM_V7S_IDX_MASK(lvl, cfg)	(ARM_V7S_PTES_PER_LVL(lvl, cfg) - 1)
 #define ARM_V7S_LVL_IDX(addr, lvl, cfg)	({				\
 	int _l = lvl;							\
-	((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \
+	((addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \
 })
 
 /*
@@ -754,7 +755,7 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg,
 {
 	struct arm_v7s_io_pgtable *data;
 
-	if (cfg->ias > ARM_V7S_ADDR_BITS)
+	if (cfg->ias > (arm_v7s_is_mtk_enabled(cfg) ? 34 : ARM_V7S_ADDR_BITS))
 		return NULL;
 
 	if (cfg->oas > (arm_v7s_is_mtk_enabled(cfg) ? 35 : ARM_V7S_ADDR_BITS))
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index ec3c87d4b172..55f9b329e637 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -319,7 +319,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom)
 			IO_PGTABLE_QUIRK_TLBI_ON_MAP |
 			IO_PGTABLE_QUIRK_ARM_MTK_EXT,
 		.pgsize_bitmap = mtk_iommu_ops.pgsize_bitmap,
-		.ias = 32,
+		.ias = 34,
 		.oas = 35,
 		.tlb = &mtk_iommu_flush_ops,
 		.iommu_dev = data->dev,
-- 
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-11-11 12:40 UTC|newest]

Thread overview: 196+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-11 12:38 [PATCH v4 00/24] MT8192 IOMMU support Yong Wu
2020-11-11 12:38 ` Yong Wu
2020-11-11 12:38 ` Yong Wu
2020-11-11 12:38 ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 01/24] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-16 17:43   ` Rob Herring
2020-11-16 17:43     ` Rob Herring
2020-11-16 17:43     ` Rob Herring
2020-11-16 17:43     ` Rob Herring
2020-11-11 12:38 ` [PATCH v4 02/24] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 21:30   ` Krzysztof Kozlowski
2020-11-11 21:30     ` Krzysztof Kozlowski
2020-11-11 21:30     ` Krzysztof Kozlowski
2020-11-11 21:30     ` Krzysztof Kozlowski
2020-11-11 12:38 ` [PATCH v4 03/24] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 21:30   ` Krzysztof Kozlowski
2020-11-11 21:30     ` Krzysztof Kozlowski
2020-11-11 21:30     ` Krzysztof Kozlowski
2020-11-11 21:30     ` Krzysztof Kozlowski
2020-11-11 12:38 ` [PATCH v4 04/24] dt-bindings: memory: mediatek: Add domain definition Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 21:30   ` Krzysztof Kozlowski
2020-11-11 21:30     ` Krzysztof Kozlowski
2020-11-11 21:30     ` Krzysztof Kozlowski
2020-11-11 21:30     ` Krzysztof Kozlowski
2020-11-16 17:44   ` Rob Herring
2020-11-16 17:44     ` Rob Herring
2020-11-16 17:44     ` Rob Herring
2020-11-16 17:44     ` Rob Herring
2020-11-11 12:38 ` [PATCH v4 05/24] dt-bindings: mediatek: Add binding for mt8192 IOMMU Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 21:33   ` Krzysztof Kozlowski
2020-11-11 21:33     ` Krzysztof Kozlowski
2020-11-11 21:33     ` Krzysztof Kozlowski
2020-11-11 21:33     ` Krzysztof Kozlowski
2020-11-12  2:41     ` Yong Wu
2020-11-12  2:41       ` Yong Wu
2020-11-12  2:41       ` Yong Wu
2020-11-12  2:41       ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 06/24] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 21:33   ` Krzysztof Kozlowski
2020-11-11 21:33     ` Krzysztof Kozlowski
2020-11-11 21:33     ` Krzysztof Kozlowski
2020-11-11 21:33     ` Krzysztof Kozlowski
2020-11-11 12:38 ` [PATCH v4 07/24] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-26 15:41   ` Robin Murphy
2020-11-26 15:41     ` Robin Murphy
2020-11-26 15:41     ` Robin Murphy
2020-11-26 15:41     ` Robin Murphy
2020-11-11 12:38 ` [PATCH v4 08/24] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-26 15:49   ` Robin Murphy
2020-11-26 15:49     ` Robin Murphy
2020-11-26 15:49     ` Robin Murphy
2020-11-26 15:49     ` Robin Murphy
2020-11-11 12:38 ` [PATCH v4 09/24] iommu/io-pgtable-arm-v7s: Clear LVL_SHIFT/BITS macro instead of the formula Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-26 16:03   ` Robin Murphy
2020-11-26 16:03     ` Robin Murphy
2020-11-26 16:03     ` Robin Murphy
2020-11-26 16:03     ` Robin Murphy
2020-11-27  6:21     ` Yong Wu
2020-11-27  6:21       ` Yong Wu
2020-11-27  6:21       ` Yong Wu
2020-11-27  6:21       ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 10/24] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-26 16:09   ` Robin Murphy
2020-11-26 16:09     ` Robin Murphy
2020-11-26 16:09     ` Robin Murphy
2020-11-26 16:09     ` Robin Murphy
2020-11-11 12:38 ` Yong Wu [this message]
2020-11-11 12:38   ` [PATCH v4 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-26 16:15   ` Robin Murphy
2020-11-26 16:15     ` Robin Murphy
2020-11-26 16:15     ` Robin Murphy
2020-11-26 16:15     ` Robin Murphy
2020-11-11 12:38 ` [PATCH v4 12/24] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-26 16:43   ` Robin Murphy
2020-11-26 16:43     ` Robin Murphy
2020-11-26 16:43     ` Robin Murphy
2020-11-26 16:43     ` Robin Murphy
2020-11-27  6:23     ` Yong Wu
2020-11-27  6:23       ` Yong Wu
2020-11-27  6:23       ` Yong Wu
2020-11-27  6:23       ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 13/24] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-12  1:10   ` Nicolas Boichat
2020-11-12  1:10     ` Nicolas Boichat
2020-11-12  1:10     ` Nicolas Boichat
2020-11-12  1:10     ` Nicolas Boichat
2020-11-12  2:42     ` Yong Wu
2020-11-12  2:42       ` Yong Wu
2020-11-12  2:42       ` Yong Wu
2020-11-12  2:42       ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 14/24] iommu/mediatek: Add pm runtime callback Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 15/24] iommu/mediatek: Add power-domain operation Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 16/24] iommu/mediatek: Add iova reserved function Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 17/24] iommu/mediatek: Add single domain Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-26 17:11   ` Robin Murphy
2020-11-26 17:11     ` Robin Murphy
2020-11-26 17:11     ` Robin Murphy
2020-11-26 17:11     ` Robin Murphy
2020-11-27  6:21     ` Yong Wu
2020-11-27  6:21       ` Yong Wu
2020-11-27  6:21       ` Yong Wu
2020-11-27  6:21       ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 18/24] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 21:34   ` Krzysztof Kozlowski
2020-11-11 21:34     ` Krzysztof Kozlowski
2020-11-11 21:34     ` Krzysztof Kozlowski
2020-11-11 21:34     ` Krzysztof Kozlowski
2020-11-11 12:38 ` [PATCH v4 19/24] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 20/24] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-18  2:19   ` kernel test robot
2020-11-18  2:19     ` kernel test robot
2020-11-18  4:32   ` kernel test robot
2020-11-18  4:32     ` kernel test robot
2020-11-11 12:38 ` [PATCH v4 21/24] iommu/mediatek: Add support for multi domain Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 22/24] iommu/mediatek: Adjust the structure Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 23/24] iommu/mediatek: Add mt8192 support Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38 ` [PATCH v4 24/24] MAINTAINERS: Add entry for MediaTek IOMMU Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 12:38   ` Yong Wu
2020-11-11 16:52   ` Chun-Kuang Hu
2020-11-11 16:52     ` Chun-Kuang Hu
2020-11-11 16:52     ` Chun-Kuang Hu
2020-11-11 16:52     ` Chun-Kuang Hu
2020-11-25 12:23 ` [PATCH v4 00/24] MT8192 IOMMU support Will Deacon
2020-11-25 12:23   ` Will Deacon
2020-11-25 12:23   ` Will Deacon
2020-11-25 12:23   ` Will Deacon

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