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From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Sebastian Reichel <sre@kernel.org>,
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Lars Povlsen <lars.povlsen@microchip.com>,
	<Steen.Hegelund@microchip.com>,
	Gregory CLEMENT <gregory.clement@bootlin.com>
Subject: [PATCH v2 1/3] dt-bindings: reset: ocelot: Add Luton and Jaguar2 support
Date: Wed, 25 Nov 2020 08:19:18 +0100	[thread overview]
Message-ID: <20201125071920.126978-2-gregory.clement@bootlin.com> (raw)
In-Reply-To: <20201125071920.126978-1-gregory.clement@bootlin.com>

This adds the support for 2 others MIPS based VCore III SoCs: Luton
and Jaguar2.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
 .../devicetree/bindings/power/reset/ocelot-reset.txt          | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
index 4d530d815484..c5de7b555feb 100644
--- a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
+++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
@@ -7,7 +7,9 @@ The reset registers are both present in the MSCC vcoreiii MIPS and
 microchip Sparx5 armv8 SoC's.
 
 Required Properties:
- - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset"
+
+ - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset",
+   "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset"
 
 Example:
 	reset@1070008 {
-- 
2.29.2


  reply	other threads:[~2020-11-25  7:19 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-25  7:19 [PATCH v2 0/3] Add reset support in ocelot driver for new platforms Gregory CLEMENT
2020-11-25  7:19 ` Gregory CLEMENT [this message]
2020-11-25  7:19 ` [PATCH v2 2/3] power: reset: ocelot: Add support 2 other MIPS based SoCs Gregory CLEMENT
2020-11-25  7:19 ` [PATCH v2 3/3] MIPS: dts: mscc: add reset support for Luton and Jaguar2 Gregory CLEMENT

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