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From: Ulrich Hecht <uli+renesas@fpond.eu>
To: linux-renesas-soc@vger.kernel.org
Cc: wsa@the-dreams.de, geert@linux-m68k.org, hoai.luu.ub@renesas.com,
	Ulrich Hecht <uli+renesas@fpond.eu>
Subject: [PATCH 11/11] pinctrl: renesas: r8a779a0: Add TPU pins, groups and functions
Date: Thu, 26 Nov 2020 18:21:54 +0100	[thread overview]
Message-ID: <20201126172154.25625-12-uli+renesas@fpond.eu> (raw)
In-Reply-To: <20201126172154.25625-1-uli+renesas@fpond.eu>

Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs
on the R-Car R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
---
 drivers/pinctrl/renesas/pfc-r8a779a0.c | 44 ++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index 4aa725b3fbca..ec5d9708a5e9 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -2535,6 +2535,36 @@ static const unsigned int tmu_tclk4_mux[] = {
 	TCLK4_MARK,
 };
 
+/* - TPU ------------------------------------------------------------------- */
+static const unsigned int tpu_to0_pins[] = {
+	/* TPU0TO0 */
+	RCAR_GP_PIN(2, 21),
+};
+static const unsigned int tpu_to0_mux[] = {
+	TPU0TO0_MARK,
+};
+static const unsigned int tpu_to1_pins[] = {
+	/* TPU0TO1 */
+	RCAR_GP_PIN(2, 22),
+};
+static const unsigned int tpu_to1_mux[] = {
+	TPU0TO1_MARK,
+};
+static const unsigned int tpu_to2_pins[] = {
+	/* TPU0TO2 */
+	RCAR_GP_PIN(3, 5),
+};
+static const unsigned int tpu_to2_mux[] = {
+	TPU0TO2_MARK,
+};
+static const unsigned int tpu_to3_pins[] = {
+	/* TPU0TO3 */
+	RCAR_GP_PIN(3, 6),
+};
+static const unsigned int tpu_to3_mux[] = {
+	TPU0TO3_MARK,
+};
+
 static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(avb0_link),
 	SH_PFC_PIN_GROUP(avb0_magic),
@@ -2704,6 +2734,11 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(tmu_tclk2),
 	SH_PFC_PIN_GROUP(tmu_tclk3),
 	SH_PFC_PIN_GROUP(tmu_tclk4),
+
+	SH_PFC_PIN_GROUP(tpu_to0),
+	SH_PFC_PIN_GROUP(tpu_to1),
+	SH_PFC_PIN_GROUP(tpu_to2),
+	SH_PFC_PIN_GROUP(tpu_to3),
 };
 
 static const char * const avb0_groups[] = {
@@ -2997,6 +3032,13 @@ static const char * const tmu_groups[] = {
 	"tmu_tclk4",
 };
 
+static const char * const tpu_groups[] = {
+	"tpu_to0",
+	"tpu_to1",
+	"tpu_to2",
+	"tpu_to3",
+};
+
 static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(avb0),
 	SH_PFC_FUNCTION(avb1),
@@ -3055,6 +3097,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(scif_clk),
 
 	SH_PFC_FUNCTION(tmu),
+
+	SH_PFC_FUNCTION(tpu),
 };
 
 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
-- 
2.20.1


  parent reply	other threads:[~2020-11-26 17:28 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-26 17:21 [PATCH 00/11] pinctrl: renesas: R8A779A0 (V3U) device support Ulrich Hecht
2020-11-26 17:21 ` [PATCH 01/11] pinctrl: renesas: r8a779a0: Add EtherAVB pins, groups and functions Ulrich Hecht
2020-11-27 14:44   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 02/11] pinctrl: renesas: r8a779a0: Add CANFD " Ulrich Hecht
2020-11-27 15:35   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 03/11] pinctrl: renesas: r8a779a0: Add DU pins, groups and function Ulrich Hecht
2020-11-27 15:50   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 04/11] pinctrl: renesas: r8a779a0: Add HSCIF pins, groups and functions Ulrich Hecht
2020-11-30 13:31   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 05/11] pinctrl: renesas: r8a779a0: Add INTC-EX pins, groups and function Ulrich Hecht
2020-11-30 13:33   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 06/11] pinctrl: renesas: r8a779a0: Add MMC pins, groups and functions Ulrich Hecht
2020-11-30 13:37   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 07/11] pinctrl: renesas: r8a779a0: Add MSIOF " Ulrich Hecht
2020-11-30 13:43   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 08/11] pinctrl: renesas: r8a779a0: Add PWM " Ulrich Hecht
2020-11-30 13:45   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 09/11] pinctrl: renesas: r8a779a0: Add QSPI pins, groups, " Ulrich Hecht
2020-11-30 13:49   ` Geert Uytterhoeven
2020-11-26 17:21 ` [PATCH 10/11] pinctrl: renesas: r8a779a0: Add TMU pins, groups " Ulrich Hecht
2020-11-30 13:57   ` Geert Uytterhoeven
2020-11-26 17:21 ` Ulrich Hecht [this message]
2020-11-30 13:59   ` [PATCH 11/11] pinctrl: renesas: r8a779a0: Add TPU " Geert Uytterhoeven
2020-11-27 10:33 ` [PATCH 00/11] pinctrl: renesas: R8A779A0 (V3U) device support Geert Uytterhoeven
2020-11-30  8:24   ` Ulrich Hecht
2020-11-30  9:01     ` Geert Uytterhoeven

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