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From: Zack Rusin <zackr@vmware.com>
To: <dri-devel@lists.freedesktop.org>
Cc: Martin Krastev <krastevm@vmware.com>,
	Roland Scheidegger <sroland@vmware.com>
Subject: [PATCH 8/8] drm/vmwgfx: Fix display register usage for some older configs
Date: Tue, 1 Dec 2020 15:18:28 -0500	[thread overview]
Message-ID: <20201201201828.808888-8-zackr@vmware.com> (raw)
In-Reply-To: <20201201201828.808888-1-zackr@vmware.com>

We can't be setting the display_id register to an invalid value
because that makes our device reset the fb which causes nasty
flicker (due to destruction and creation of a new fb).
Also we can't be using the BITS_PER_PIXEL register if the
8BIT_EMULATION is not supported.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Martin Krastev <krastevm@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
---
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 3 ++-
 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 1 -
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 551070fa87a3..31218bf6db51 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -1873,7 +1873,8 @@ int vmw_kms_write_svga(struct vmw_private *vmw_priv,
 		vmw_fifo_mem_write(vmw_priv, SVGA_FIFO_PITCHLOCK, pitch);
 	vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
 	vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
-	vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
+	if ((vmw_priv->capabilities & SVGA_CAP_8BIT_EMULATION) != 0)
+		vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
 
 	if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
 		DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index 4a4ae14d9b9b..fa8ce1b9de13 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -125,7 +125,6 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv)
 		vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y);
 		vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay);
 		vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, crtc->mode.vdisplay);
-		vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
 
 		i++;
 	}
-- 
2.25.1

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      parent reply	other threads:[~2020-12-01 20:33 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-01 20:18 [PATCH 1/8] drm/vmwgfx: add Zack Rusin as maintainer Zack Rusin
2020-12-01 20:18 ` [PATCH 2/8] drm/vmwgfx: Remove stealth mode Zack Rusin
2020-12-01 20:18 ` [PATCH 3/8] drm/vmwgfx: Switch to a managed drm device Zack Rusin
2020-12-02  0:46   ` kernel test robot
2020-12-02  0:46     ` kernel test robot
2020-12-01 20:18 ` [PATCH 4/8] drm/vmwgfx: Cleanup fifo mmio handling Zack Rusin
2020-12-02  2:27   ` kernel test robot
2020-12-02  2:27     ` kernel test robot
2020-12-01 20:18 ` [PATCH 5/8] drm/vmwgfx: Cleanup pci resource allocation Zack Rusin
2020-12-01 20:18 ` [PATCH 6/8] drm/vmwgfx: Remove the throttling code Zack Rusin
2020-12-01 20:18 ` [PATCH 7/8] drm/vmwgfx: Cleanup the cmd/fifo split Zack Rusin
2020-12-01 20:18 ` Zack Rusin [this message]

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