From: Jarkko Nikula <jarkko.nikula@linux.intel.com>
To: linux-spi@vger.kernel.org
Cc: Mark Brown <broonie@kernel.org>, Daniel Mack <daniel@zonque.org>,
Haojian Zhuang <haojian.zhuang@gmail.com>,
Robert Jarzmik <robert.jarzmik@free.fr>,
Jarkko Nikula <jarkko.nikula@linux.intel.com>
Subject: [PATCH] spi: pxa2xx: Add support for Intel Alder Lake PCH-S
Date: Fri, 4 Dec 2020 10:24:09 +0200 [thread overview]
Message-ID: <20201204082409.183700-1-jarkko.nikula@linux.intel.com> (raw)
Add support for LPSS SPI on Intel Alder Lake. It has four LPSS SPI
controllers each having two chip selects.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
---
drivers/spi/spi-pxa2xx.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index 814268405ab0..62a0f0f86553 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -1496,6 +1496,11 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
{ PCI_VDEVICE(INTEL, 0x5ac2), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x5ac4), LPSS_BXT_SSP },
{ PCI_VDEVICE(INTEL, 0x5ac6), LPSS_BXT_SSP },
+ /* ADL-S */
+ { PCI_VDEVICE(INTEL, 0x7aaa), LPSS_CNL_SSP },
+ { PCI_VDEVICE(INTEL, 0x7aab), LPSS_CNL_SSP },
+ { PCI_VDEVICE(INTEL, 0x7af9), LPSS_CNL_SSP },
+ { PCI_VDEVICE(INTEL, 0x7afb), LPSS_CNL_SSP },
/* CNL-LP */
{ PCI_VDEVICE(INTEL, 0x9daa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x9dab), LPSS_CNL_SSP },
--
2.29.2
next reply other threads:[~2020-12-04 8:25 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-04 8:24 Jarkko Nikula [this message]
2020-12-04 23:31 ` [PATCH] spi: pxa2xx: Add support for Intel Alder Lake PCH-S Mark Brown
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